公开(公告)号：US08441807B2

公开(公告)日：2013-05-14

申请号：US13040915

申请日：2011-03-04

Applicant: Naofumi Kitano ,  Toshiro Nishimura

Inventor： Naofumi Kitano ,  Toshiro Nishimura

IPC: H05K7/00

CPC classification number: H05K1/0231 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H05K1/0251 ,  H05K1/113 ,  H05K1/165 ,  H05K3/4614 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/10545 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: An electronic circuit is obtained that has reduced EMI levels. The circuit includes an integrated circuit, which is a source of noise, a bypass capacitor, and a circuit substrate on which they are mounted. An electronic circuit one electrode terminal of the bypass capacitor and one connecting electrode of the integrated circuit are connected through a first wire interconnect formed in the circuit substrate, and, additionally, another electrode terminal of the bypass capacitor and another connecting electrode of the integrated circuit are connected through a second wire interconnect, and the gap between the first wire interconnect and the second wire interconnect is made smaller than either the gap between the one connecting electrode and the other connecting electrode on the integrated circuit or the gap between the one electrode terminal and the other electrode terminal of the bypass capacitor.

Abstract translation: 获得具有降低的EMI电平的电子电路。 电路包括作为噪声源的集成电路，旁路电容器和安装在其上的电路基板。 旁路电容器的一个电极端子和集成电路的一个连接电极的电子电路通过形成在电路基板中的第一线路互连而连接，另外，旁路电容器的另一个电极端子和集成电路的另一个连接电极 通过第二导线互连连接，并且使第一线互连和第二线互连之间的间隙小于集成电路上的一个连接电极和另一个连接电极之间的间隙或者一个电极端子之间的间隙 旁路电容器的另一个电极端子。

公开(公告)号：US20120092838A1

公开(公告)日：2012-04-19

申请号：US13272877

申请日：2011-10-13

Applicant: Naofumi Kitano ,  Tetsuya Esaki

Inventor： Naofumi Kitano ,  Tetsuya Esaki

IPC: H05K1/00

CPC classification number: H05K1/0215 ,  H05K1/0224 ,  H05K1/147 ,  H05K2201/0397 ,  H05K2201/09681

Abstract: A multilayer flexible printed circuit board disclosed in the present application is a multilayer flexible printed circuit board in which a ground layer, an insulating layer and a signal wiring layer in which signal wiring is formed are laminated in sequence, with the multilayer flexible printed circuit board including a protruding portion protruding laterally, and a ground that is electrically connected to the ground layer being formed on at least one surface of the protruding portion, in order to have shielding properties that can cope with high speed signal transmission performed via the signal wiring layer.

Abstract translation: 本申请中公开的多层柔性印刷电路板是多层柔性印刷电路板，其中依次层叠形成信号布线的接地层，绝缘层和信号布线层，多层柔性印刷电路板 包括横向突出的突出部分和在突出部分的至少一个表面上形成的与接地层电连接的接地，以便具有能够应付经由信号布线层执行的高速信号传输的屏蔽特性 。

公开(公告)号：US20110222255A1

公开(公告)日：2011-09-15

申请号：US13040915

申请日：2011-03-04

Applicant: Naofumi KITANO ,  Toshiro NISHIMURA

Inventor： Naofumi KITANO ,  Toshiro NISHIMURA

IPC: H05K7/02

CPC classification number: H05K1/0231 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H05K1/0251 ,  H05K1/113 ,  H05K1/165 ,  H05K3/4614 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/10545 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: An electronic circuit is obtained that has reduced EMI levels. The circuit includes an integrated circuit, which is a source of noise, a bypass capacitor, and a circuit substrate on which they are mounted. An electronic circuit one electrode terminal of the bypass capacitor and one connecting electrode of the integrated circuit are connected through a first wire interconnect formed in the circuit substrate, and, additionally, another electrode terminal of the bypass capacitor and another connecting electrode of the integrated circuit are connected through a second wire interconnect, and the gap between the first wire interconnect and the second wire interconnect is made smaller than either the gap between the one connecting electrode and the other connecting electrode on the integrated circuit or the gap between the one electrode terminal and the other electrode terminal of the bypass capacitor.

Abstract translation: 获得具有降低的EMI电平的电子电路。 电路包括作为噪声源的集成电路，旁路电容器和安装在其上的电路基板。 旁路电容器的一个电极端子和集成电路的一个连接电极的电子电路通过形成在电路基板中的第一线路互连而连接，另外，旁路电容器的另一个电极端子和集成电路的另一个连接电极 通过第二导线互连连接，并且使第一线互连和第二线互连之间的间隙小于集成电路上的一个连接电极和另一个连接电极之间的间隙或者一个电极端子之间的间隙 旁路电容器的另一个电极端子。

公开(公告)号：US08848386B2

公开(公告)日：2014-09-30

申请号：US13272837

申请日：2011-10-13

Applicant: Naofumi Kitano ,  Toshiro Nishimura

Inventor： Naofumi Kitano ,  Toshiro Nishimura

IPC: H05K1/18 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K1/0231 ,  H01L2224/16227 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/113 ,  H05K2201/0979 ,  H05K2201/10545

Abstract: In order to keep impedance characteristics to desired values across the entire operating frequency band, an electronic circuit of the present invention includes an integrated circuit, a decoupling capacitor, and a multilayer circuit board on which the integrated circuit and the decoupling capacitor are mounted. In the electronic circuit, a planar land is formed on one or both of a power layer and a ground layer of the multilayer circuit board, the land having densely disposed therein a plurality of via holes that connect a terminal of the integrated circuit and a corresponding terminal of the decoupling capacitor, and the land formed on the power layer or the ground layer is discontinuously disposed at a predetermined interval with a gap having a predetermined width provided therebetween.

Abstract translation: 为了将阻抗特性保持在整个工作频带上的期望值，本发明的电子电路包括集成电路，去耦电容器和其上安装有集成电路和去耦电容器的多层电路板。 在电子电路中，在多层电路板的功率层和接地层的一个或两个上形成平坦的焊盘，其中，密集地设置有多个连接集成电路的端子的通孔和相应的 去耦电容器的端子和形成在功率层或接地层上的焊盘以预定间隔不连续地设置，其间具有设置在其间的预定宽度的间隙。

公开(公告)号：US20120092843A1

公开(公告)日：2012-04-19

申请号：US13272837

申请日：2011-10-13

Applicant: Naofumi KITANO ,  Toshiro NISHIMURA

Inventor： Naofumi KITANO ,  Toshiro NISHIMURA

IPC: H05K1/16

CPC classification number: H05K1/0231 ,  H01L2224/16227 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/113 ,  H05K2201/0979 ,  H05K2201/10545

Abstract: In order to keep impedance characteristics to desired values across the entire operating frequency band, an electronic circuit of the present invention includes an integrated circuit, a decoupling capacitor, and a multilayer circuit board on which the integrated circuit and the decoupling capacitor are mounted. In the electronic circuit, a planar land is formed on one or both of a power layer and a ground layer of the multilayer circuit board, the land having densely disposed therein a plurality of via holes that connect a terminal of the integrated circuit and a corresponding terminal of the decoupling capacitor, and the land formed on the power layer or the ground layer is discontinuously disposed at a predetermined interval with a gap having a predetermined width provided therebetween.

Abstract translation: 为了将阻抗特性保持在整个工作频带上的期望值，本发明的电子电路包括集成电路，去耦电容器和其上安装有集成电路和去耦电容器的多层电路板。 在电子电路中，在多层电路板的功率层和接地层的一个或两个上形成平坦的焊盘，其中，密集地设置有多个连接集成电路的端子的通孔和相应的 去耦电容器的端子和形成在功率层或接地层上的焊盘以预定间隔不连续地设置，其间具有设置在其间的预定宽度的间隙。

公开(公告)号：US08476532B2

公开(公告)日：2013-07-02

申请号：US13272877

申请日：2011-10-13

Applicant: Naofumi Kitano ,  Tetsuya Esaki

Inventor： Naofumi Kitano ,  Tetsuya Esaki

IPC: H05K1/00

CPC classification number: H05K1/0215 ,  H05K1/0224 ,  H05K1/147 ,  H05K2201/0397 ,  H05K2201/09681

Abstract: A multilayer flexible printed circuit board disclosed in the present application is a multilayer flexible printed circuit board in which a ground layer, an insulating layer and a signal wiring layer in which signal wiring is formed are laminated in sequence, with the multilayer flexible printed circuit board including a protruding portion protruding laterally, and a ground that is electrically connected to the ground layer being formed on at least one surface of the protruding portion, in order to have shielding properties that can cope with high speed signal transmission performed via the signal wiring layer.

Abstract translation: 本申请中公开的多层柔性印刷电路板是多层柔性印刷电路板，其中依次层叠形成信号布线的接地层，绝缘层和信号布线层，多层柔性印刷电路板 包括横向突出的突出部分和在突出部分的至少一个表面上形成的与接地层电连接的接地，以便具有能够应付经由信号布线层执行的高速信号传输的屏蔽特性 。