-
公开(公告)号：US07189293B2
公开(公告)日：2007-03-13
申请号：US10482099
申请日：2002-06-25
申请人： Norihiro Kobayashi , Masaro Tamatsuka , Takatoshi Nagoya , Wei Feig Qu , Hiroshi Takeno , Ken Aihara
发明人： Norihiro Kobayashi , Masaro Tamatsuka , Takatoshi Nagoya , Wei Feig Qu , Hiroshi Takeno , Ken Aihara
IPC分类号： C30B33/02
CPC分类号： H01L21/324 , C30B29/06 , C30B33/00 , H01L21/3225
摘要： The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.
摘要翻译： 本发明是一种退火晶片的制造方法，其中通过Czochralski（CZ）方法制造的直径为200mm以上的硅单晶晶片在氩气气氛中进行高温热处理， 氢气或其混合气体在1100-1350℃的温度下进行10-600分钟，在高温热处理之前，在低于高温热的温度下进行预退火 从而通过生长氧化物沉淀物来抑制滑移位错的生长。 因此，提供了一种制造退火晶片的方法，其中抑制了在高温热处理中产生的滑移位错的产生和生长，并且即使在硅单晶晶片的情况下晶片表面层中的缺陷密度也降低 具有大直径为200mm以上的退火晶片。
-
公开(公告)号：US07153785B2
公开(公告)日：2006-12-26
申请号：US10487405
申请日：2002-08-23
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： C30B29/06 , C30B33/00 , H01L21/3225 , H01L21/324
摘要： The present invention provides method of producing an annealed wafer wherein a silicon single crystal wafer produced by the Czochralski (CZ) method is subjected to a high temperature annealing in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, during the annealing the silicon single crystal wafer is supported by a supporting jig only in a central side region of the wafer except for 5 mm or more from a peripheral end of the wafer, and before performing the high temperature annealing, a pre-annealing is performed at a temperature less than the temperature of the high temperature annealing to grow oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein slip dislocations generated in a high temperature annealing can be suppressed even in the case of a silicon single crystal wafer having a large diameter of 300 mm or more, and provided the annealed wafer.
摘要翻译： 本发明提供一种退火晶片的制造方法，其中通过Czochralski（CZ）方法制造的硅单晶晶片在氩气，氢气或其混合气体的气氛中进行高温退火 温度为1100-1350℃，持续10-600分钟，在退火过程中，硅单晶晶片仅在晶片的中心侧区域由支撑夹具支撑，除了距离晶片的外周端5mm以上 ，在进行高温退火之前，在低于高温退火温度的温度下进行预退火，生长氧化物析出物。 因此，提供了一种制造退火晶片的方法，其中即使在具有300mm或更大直径的硅单晶晶片的情况下，也可以抑制在高温退火中产生的滑移位错，并提供退火晶片。
-
公开(公告)号：US06841450B2
公开(公告)日：2005-01-11
申请号：US10130431
申请日：2001-09-18
IPC分类号： B60R1/06 , B01J35/02 , B60J1/00 , C03C17/34 , C09K3/18 , H01L21/304 , H01L21/324 , H01L21/336
CPC分类号： H01L21/324
摘要： The present invention provides an annealed wafer manufacturing method using a heat treatment method causing no change in resistivity of a wafer surface even when a silicon wafer having boron deposited on a surface thereof from an environment is subjected to heat treatment in an insert gas atmosphere and enabling the heat treatment in an ordinary diffusion furnace not requiring a sealed structure for increasing airtightness nor any specific facility such as explosion-proof facility. The present invention also provides an annealed wafer in which a boron concentration in the vicinity of a surface thereof is constant and crystal defects are annihilated. In the annealed wafer manufacturing method, a silicon wafer having a natural oxide film formed on a surface thereof with boron deposited thereon from an environment is subjected to heat treatment in an atmosphere containing hydrogen gas to remove the deposited boron before the natural oxide film is removed, and then is subjected to heat treatment in an inert gas atmosphere.
摘要翻译： 本发明提供一种退火晶片的制造方法，其使用不会改变晶片表面的电阻率的热处理方法，即使当在其表面上沉积硼的硅晶片在嵌入气体气氛中进行热处理时， 在不需要用于增加气密性的密封结构的普通扩散炉中的热处理以及防爆设施等具体设施。 本发明还提供一种其表面附近的硼浓度恒定并且结晶缺陷被消除的退火晶片。 在退火的晶片制造方法中，将具有在其表面上形成有自然氧化物膜的硅晶片从环境沉积在其上的硅晶片在包含氢气的气氛中进行热处理，以在去除天然氧化物膜之前去除沉积的硼 然后在惰性气体气氛中进行热处理。
-
公开(公告)号：US06805743B2
公开(公告)日：2004-10-19
申请号：US10333970
申请日：2003-01-24
IPC分类号： C30B2502
CPC分类号： C30B29/06 , C30B33/00 , H01L21/3225
摘要： According to the present invention, there are provided a method for producing a silicon single crystal wafer which contains oxygen induced defects by subjecting a silicon single crystal wafer containing interstitial oxygen to a heat treatment wherein the heat treatment includes at least a step of performing a heat treatment using a resistance-heating type heat treatment furnace and a step of performing a heat treatment using a rapid heating and rapid cooling apparatus, and a silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wafer which has a DZ layer of higher quality compared with a conventional wafer in a wafer surface layer part and has oxygen induced defects at a sufficient density in a bulk part and the silicon single crystal wafer.
摘要翻译： 根据本发明，提供了一种通过对含有间隙氧的硅单晶晶片进行热处理而含有氧诱发缺陷的硅单晶晶片的制造方法，其中，热处理至少包括进行热处理的步骤 使用电阻加热型热处理炉的处理以及使用快速加热和快速冷却装置进行热处理的步骤，以及通过该方法制造的硅单晶晶片。 可以提供一种制造硅单晶晶片的方法，其具有与晶片表面层部分中的常规晶片相比具有更高质量的DZ层，并且在体积部分中具有足够密度的氧诱发缺陷，并且硅单晶 晶圆。
-
公开(公告)号：US06670261B2
公开(公告)日：2003-12-30
申请号：US09979717
申请日：2001-11-28
IPC分类号： H01L21425
CPC分类号： H01L21/324 , H01L21/02052 , H01L21/3225 , Y10S438/906
摘要： There is provided a manufacturing process for an annealed wafer capable of reducing boron contamination occurring while annealing is performed in a state where a wafer surface after cleaning is exposed to a gas in Ar atmosphere to suppress a change in resistivity due to an increase in a boron concentration in the vicinity of the wafer surface after annealing and manufacture an annealed wafer in which a difference in a boron concentration between a surface layer portion thereof and a bulk portion thereof is essentially not a problem even if a silicon wafer having a comparative low boron concentration (1×1016 atoms/cm3 or less) is used as the annealed wafer. The manufacturing process for an annealed wafer comprises: cleaning a silicon wafer; and loading the silicon wafer into a heat treatment furnace to heat-treat the silicon wafer in an Ar atmosphere, wherein an aqueous solution including hydrofluoric acid is used as a final cleaning liquid in the cleaning.
摘要翻译： 提供了一种用于退火晶片的制造方法，其能够在将清洁后的晶片表面暴露于Ar气氛中的气体的状态下进行退火的同时进行退火，以抑制由于硼的增加导致的电阻率变化 退火后的晶片表面附近的浓度，制造退火晶片，其中表面层部分和其主体部分之间的硼浓度差异基本上不成问题，即使具有比较低的硼浓度的硅晶片 （1×10 16原子/ cm 3以下）用作退火晶片。 退火晶片的制造方法包括：清洗硅晶片; 并将硅晶片加载到热处理炉中以在Ar气氛中对硅晶片进行加热处理，其中使用包含氢氟酸的水溶液作为清洗中的最终清洗液。
-
公开(公告)号：US5156982A
公开(公告)日：1992-10-20
申请号：US817038
申请日：1992-01-03
申请人： Takatoshi Nagoya
发明人： Takatoshi Nagoya
IPC分类号： A01K89/015 , G03F7/20
CPC分类号： G03F7/70633
摘要： A method capable of measuring pattern shift of a semiconductor wafer in a short period of time with utmost ease and in an inexpensive manner is disclosed, wherein a main scale pattern and a vernier scale pattern are formed in parallel spaced confrontation on the semiconductor wafer, then one of the main scale pattern and the vernier scale pattern is covered with an oxide film layer, subsequently an epitaxial growing process is performed to form an epitaxial layer over the semiconductor wafer, and after that the dispalcement between the main scale pattern and the vernier scale pattern is measured.
摘要翻译： 公开了一种能够在短时间内以廉价的方式测量半导体晶片的图案偏移的方法，其中在半导体晶片上以平行间隔的对置形成主刻度图案和游标刻度图案，然后 主要尺度图案和游标刻度图案之一被氧化膜层覆盖，随后进行外延生长工艺以在半导体晶片上形成外延层，之后主尺度图案与游标尺之间的分布 模式被测量。
-
7.发明申请公开(公告)号：US20110045246A1
公开(公告)日：2011-02-24
申请号：US12990038
申请日：2009-05-07
CPC分类号： C30B29/06 , C30B33/02 , H01L21/02008 , H01L22/12 , H01L2924/0002 , Y10T428/24355 , H01L2924/00
摘要： A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
摘要翻译： 一种制造硅单晶晶片的方法，至少具有：制备硅单晶锭的步骤; 切割硅单晶锭以制造多个切片基板的步骤; 通过进行研磨，蚀刻和研磨中的至少一种来将多个切片基板加工成多个基板的处理步骤; 从所述多个基板中取样至少一个的步骤; 通过AFM测量在采样步骤中采样的基板的表面粗糙度并获得对应于20nm至50nm的波长的频带的振幅（强度）以判定接受的步骤; 以及如果判断结果为拒绝则判断结果为接受或执行再处理的步骤，将基板发送到下一步骤。
-
公开(公告)号：US07622312B2
公开(公告)日：2009-11-24
申请号：US11886059
申请日：2006-02-06
申请人： Takatoshi Nagoya
发明人： Takatoshi Nagoya
IPC分类号： H01L21/66
摘要： The present invention provides a method for evaluating dopant contamination of a semiconductor wafer, wherein a resistivity of a bulk portion of the semiconductor wafer is measured by an eddy current method, a resistivity in a surface layer of the semiconductor wafer is measured by a surface photovoltage method, and an amount of dopant contamination of the semiconductor wafer is calculated from a difference between a value of the resistivity of the bulk portion measured by the eddy current method and a value of the resistivity in the surface layer measured by the surface photovoltage method. As a result of this, it is possible to provide the method for evaluating dopant contamination of a semiconductor wafer, which can measure the amount of dopant contamination of a whole surface layer of the semiconductor wafer without contact, nondestructively, and accurately.
摘要翻译： 本发明提供一种用于评估半导体晶片的掺杂剂污染的方法，其中通过涡流法测量半导体晶片的体积部分的电阻率，通过表面光电压测量半导体晶片的表面层中的电阻率 方法，并且根据通过涡流法测量的本体部分的电阻率的值与通过表面光电压方法测量的表面层中的电阻率的值之间的差计算半导体晶片的掺杂剂污染物的量。 作为其结果，可以提供用于评估半导体晶片的掺杂剂污染的方法，其可以非接触地，非破坏性地且准确地测量半导体晶片的整个表面层的掺杂剂污染物的量。
-
公开(公告)号：US20080108155A1
公开(公告)日：2008-05-08
申请号：US11886059
申请日：2006-02-06
申请人： Takatoshi Nagoya
发明人： Takatoshi Nagoya
IPC分类号： H01L21/66
摘要： The present invention provides a method for evaluating dopant contamination of a semiconductor wafer, wherein a resistivity of a bulk portion of the semiconductor wafer is measured by an eddy current method, a resistivity in a surface layer of the semiconductor wafer is measured by a surface photovoltage method, and an amount of dopant contamination of the semiconductor wafer is calculated from a difference between a value of the resistivity of the bulk portion measured by the eddy current method and a value of the resistivity in the surface layer measured by the surface photovoltage method. As a result of this, it is possible to provide the method for evaluating dopant contamination of a semiconductor wafer, which can measure the amount of dopant contamination of a whole surface layer of the semiconductor wafer without contact, nondestructively, and accurately.
摘要翻译： 本发明提供一种用于评估半导体晶片的掺杂剂污染的方法，其中通过涡流法测量半导体晶片的体积部分的电阻率，通过表面光电压测量半导体晶片的表面层中的电阻率 方法，并且根据通过涡流法测量的本体部分的电阻率的值与通过表面光电压方法测量的表面层中的电阻率的值之间的差计算半导体晶片的掺杂剂污染物的量。 作为其结果，可以提供用于评估半导体晶片的掺杂剂污染的方法，其可以非接触地，非破坏性地且准确地测量半导体晶片的整个表面层的掺杂剂污染物的量。
-
公开(公告)号：US5685905A
公开(公告)日：1997-11-11
申请号：US612393
申请日：1996-03-07
IPC分类号： H01L21/205 , C30B25/14 , C30B25/16
CPC分类号： C30B25/14
摘要： In the preparation stage before the manufacturing of the single crystal thin film 13, growth conditions are determined by conducting a vapor phase growth without rotating the rotatable holder 14 on its axis and making adjustments such that the growth rate of the single crystal thin film 13 is laterally asymmetric with respect to the virtual center axis on the holder 14 parallel to the feeding direction of the source material gas 19, and then said single crystal thin film is manufactured based on said growth conditions.
摘要翻译： 在制造单晶薄膜13之前的制备阶段，生长条件是通过在不旋转可旋转保持器14的轴线的情况下进行气相生长来确定的，并进行调整，使得单晶薄膜13的生长速率为 相对于平行于原料气体19的进给方向的保持器14上的虚拟中心轴横向不对称，然后基于所述生长条件制造所述单晶薄膜。
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.024 秒)
