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12 条记录 (耗时 0.021 秒)

    DEVICE AND METHOD FOR CONTINUOUS CELL CULTURE AND OTHER REACTIONS
    4.
    发明申请
    DEVICE AND METHOD FOR CONTINUOUS CELL CULTURE AND OTHER REACTIONS 审中-公开

    公开(公告)号：US20130084622A1

    公开(公告)日：2013-04-04

    申请号：US13249959

    申请日：2011-09-30

    申请人： Rajeev Jagga Ram ,  Kevin Shao-Kwan Lee

    发明人： Rajeev Jagga Ram ,  Kevin Shao-Kwan Lee

    IPC分类号： C12N1/20 ,  C12M1/04

    CPC分类号： C12M23/26 ,  C12M23/24 ,  C12M29/18 ,  C12M41/40

    摘要： Devices, systems, and methods for continuous cell culture and other reactions are generally described. In some embodiments, chambers (e.g., cell growth chambers) including at least a portion of a wall formed of a flexible member are provided. A retaining structure can be incorporated outside and proximate to the chamber such that when liquid is added to the chamber, the flexible member is consistently and predictably deformed, and a consistent volume of liquid is added. The flexible member can be formed of, in some embodiments, a gas-permeable medium. In some embodiments, reaction chambers can be arranged in a fluidic loop, and a bypass channel can be used to introduce and/or extract fluid from the loop without affecting loop operation.

    Waveguide formation using CMOS fabrication techniques
    5.
    发明授权
    Waveguide formation using CMOS fabrication techniques 有权
    使用CMOS制造技术的波导形成

    公开(公告)号：US09529150B2

    公开(公告)日：2016-12-27

    申请号：US14520893

    申请日：2014-10-22

    申请人： Jason Scott Orcutt ,  Karan Kartik Mehta ,  Rajeev Jagga Ram ,  Amir Hossein Atabaki

    发明人： Jason Scott Orcutt ,  Karan Kartik Mehta ,  Rajeev Jagga Ram ,  Amir Hossein Atabaki

    IPC分类号： G02B6/122 ,  G02B6/12 ,  G02B6/136 ,  G02B6/132 ,  G02F1/01 ,  G02F1/025 ,  G02B6/30 ,  G02F1/015

    CPC分类号： G02B6/136 ,  G02B6/12004 ,  G02B6/122 ,  G02B6/1225 ,  G02B6/132 ,  G02B6/305 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/121 ,  G02B2006/12107 ,  G02B2006/12123 ,  G02F1/0147 ,  G02F1/025 ,  G02F2001/0151

    摘要： Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer. Filling the trench with a high-index dielectric material yields a waveguide that can guide visible and/or infrared light, depending on the waveguide's dimensions and refractive index contrast.

    摘要翻译： 在标准电子工艺中集成波导的常规方法通常涉及在铸造工艺中使用介电层，例如多晶硅，单晶硅或氮化硅，或者在后端中沉积和图案化电介质层作为后铸造 处理。 在本方法中，在铸造处理之后，硅手柄的后端被蚀刻掉以暴露使用标准铸造处理（例如，互补金属氧化物半导体（CMOS）处理）限定的空隙或沟槽。 将介电材料沉积到空隙或沟槽中产生集成在晶片前端内的光波导。 例如，形成在铸造中的浅沟槽隔离（STI）层可以在模具或晶片的前端内的镶嵌工艺中用作高分辨率图案化波导模板。 使用高折射率介电材料填充沟槽产生可以引导可见光和/或红外光的波导，这取决于波导的尺寸和折射率对比度。

    WAVEGUIDE FORMATION USING CMOS FABRICATION TECHNIQUES
    6.
    发明申请
    WAVEGUIDE FORMATION USING CMOS FABRICATION TECHNIQUES 有权
    使用CMOS制造技术的波形形成

    公开(公告)号：US20150125111A1

    公开(公告)日：2015-05-07

    申请号：US14520893

    申请日：2014-10-22

    申请人： Jason Scott Orcutt ,  Karan Kartik Mehta ,  Rajeev Jagga Ram ,  Amir Hossein Atabaki

    发明人： Jason Scott Orcutt ,  Karan Kartik Mehta ,  Rajeev Jagga Ram ,  Amir Hossein Atabaki

    IPC分类号： G02B6/122 ,  G02B6/132 ,  G02B6/136 ,  G02B6/10 ,  G02B6/12

    CPC分类号： G02B6/136 ,  G02B6/12004 ,  G02B6/122 ,  G02B6/1225 ,  G02B6/132 ,  G02B6/305 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/121 ,  G02B2006/12107 ,  G02B2006/12123 ,  G02F1/0147 ,  G02F1/025 ,  G02F2001/0151

    摘要： Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer. Filling the trench with a high-index dielectric material yields a waveguide that can guide visible and/or infrared light, depending on the waveguide's dimensions and refractive index contrast.

    摘要翻译： 在标准电子工艺中集成波导的常规方法通常涉及在铸造工艺中使用介电层，例如多晶硅，单晶硅或氮化硅，或者在后端中沉积和图案化电介质层作为后铸造 处理。 在本方法中，在铸造处理之后，硅手柄的后端被蚀刻掉以暴露使用标准铸造处理（例如，互补金属氧化物半导体（CMOS）处理）限定的空隙或沟槽。 将介电材料沉积到空隙或沟槽中产生集成在晶片前端内的光波导。 例如，形成在铸造中的浅沟槽隔离（STI）层可以在模具或晶片的前端内的镶嵌工艺中用作高分辨率图案化波导模板。 使用高折射率介电材料填充沟槽产生可以引导可见光和/或红外光的波导，这取决于波导的尺寸和折射率对比度。

    Phonon-recyling light-emitting diodes
    9.
    发明授权
    Phonon-recyling light-emitting diodes 有权
    声子再生发光二极管

    公开(公告)号：US09557215B2

    公开(公告)日：2017-01-31

    申请号：US13969225

    申请日：2013-08-16

    申请人： Parthiban Santhanam ,  Dodd Joseph Gray ,  Rajeev Jagga Ram

    发明人： Parthiban Santhanam ,  Dodd Joseph Gray ,  Rajeev Jagga Ram

    IPC分类号： G01J3/02 ,  H01L33/00 ,  F21V3/02 ,  G01J3/10 ,  G01J3/42 ,  F21Y101/00

    CPC分类号： G01J3/0216 ,  F21K9/20 ,  F21V3/02 ,  F21Y2101/00 ,  F21Y2115/10 ,  G01J3/108 ,  G01J3/42 ,  H01L33/0004

    摘要： Contrary to conventional wisdom, which holds that light-emitting diodes (LEDs) should be cooled to increase efficiency, the LEDs disclosed herein are heated to increase efficiency. Heating an LED operating at low forward bias voltage can be accomplished by injecting phonons generated by non-radiative recombination back into the LED's semiconductor lattice. This raises the temperature of the LED's active rejection, resulting in thermally assisted injection of holes and carriers into the LED's active region. This phonon recycling or thermo-electric pumping process can be promoted by heating the LED with an external source (e.g., exhaust gases or waste heat from other electrical components). It can also be achieved via internal heat generation, e.g., by thermally insulating the LED's diode structure to prevent (rather than promote) heat dissipation. In other words, trapping heat generated by the LED within the LED increases LED efficiency under certain bias conditions.

    摘要翻译： 与传统观念相反，认为应该将发光二极管（LED）冷却以提高效率，因此本文公开的LED被加热以提高效率。 加热在低正向偏压下工作的LED可以通过将非辐射复合产生的声子注入到LED的半导体晶格中来实现。 这提高了LED的主动抑制的温度，导致热辅助将空穴和载体注入LED的有源区域。 可以通过用外部源（例如来自其他电气部件的废气或废热）加热LED来促进该声子再循环或热电泵送过程。 也可以通过内部发热来实现，例如通过将LED的二极管结构隔热来防止（而不是促进）散热。 换句话说，LED内的LED产生的热量会在某些偏压条件下提高LED的效率。