公开(公告)号：US4502203A

公开(公告)日：1985-03-05

申请号：US561243

申请日：1983-12-13

申请人： Junichi Nishizawa ,  Soubei Suzuki ,  Takashige Tamamushi

发明人： Junichi Nishizawa ,  Soubei Suzuki ,  Takashige Tamamushi

IPC分类号： H01L27/146 ,  H01L31/10 ,  H01L21/22

CPC分类号： H01L27/14603 ,  H01L27/14623 ,  H01L27/14679 ,  H01L27/14687

摘要： A method for fabricating a photodetector device including a single pixel or an array of pixels, each of which is constituted by a single vertical type SIT (Static Induction Transistor). First and second main electrode regions are formed on respective first and second main surfaces of a silicon wafer. Control gate and shielding gate regions, as well as drain and source regions as well, are formed using a single common masking step. As a result, the formation of these regions is precisely controlled, resulting in superior photoresponse characteristics.

摘要翻译： 一种用于制造包括单个像素或像素阵列的光电检测器件的方法，每个像素由单个垂直型SIT（静态感应晶体管）构成。 第一和第二主电极区域形成在硅晶片的相应的第一和第二主表面上。 控制栅极和屏蔽栅极区以及漏极和源极区也使用单个公共掩模步骤形成。 结果，这些区域的形成被精确地控制，导致优异的光响应特性。

公开(公告)号：US4806321A

公开(公告)日：1989-02-21

申请号：US759098

申请日：1985-07-25

申请人： Junichi Nishizawa ,  Hitoshi Abe ,  Soubei Suzuki

发明人： Junichi Nishizawa ,  Hitoshi Abe ,  Soubei Suzuki

IPC分类号： H01L21/268 ,  C23C16/48 ,  C30B25/10 ,  C30B25/16 ,  H01L21/205 ,  C30B35/00 ,  C30B23/02 ,  C30B25/14

CPC分类号： C30B25/16 ,  C30B25/105 ,  H01L21/02395 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02661

摘要： In a semiconductor crystal growth apparatus, a growth vessel enclosing a substrate is evacuated to an ultrahigh vacuum, and gas molecules containing a component element of a semiconductor which should grow on the substrate is introduced according to a predetermined time sequence into the growth vessel from an external gas source. Infrared radiation from an infrared radiation emitting lamp associated with the growth vessel and controlled by a temperature control unit is directed toward and onto the substrate whose temperature is to be maintained at a predetermined setting. Crystal growth of one molecular layer after another can be achieved by the apparatus with dimensional accuracy of the thickness of a single molecular layer.

摘要翻译： 在半导体晶体生长装置中，将包围衬底的生长容器抽真空至超高真空，并且将含有应在衬底上生长的半导体组分元素的气体分子根据预定时间序列从生长容器 外部气源。 来自与生长容器相关并由温度控制单元控制的红外辐射发射灯的红外辐射被引导到衬底上并将其温度保持在预定的设置。 另一个分子层的晶体生长可以通过具有单分子层厚度的尺寸精度的装置来实现。

公开(公告)号：US5294286A

公开(公告)日：1994-03-15

申请号：US3308

申请日：1993-01-12

申请人： Junichi Nishizawa ,  Hitoshi Abe ,  Soubei Suzuki

发明人： Junichi Nishizawa ,  Hitoshi Abe ,  Soubei Suzuki

IPC分类号： C23C16/24 ,  C23C16/44 ,  C23C16/455 ,  C23C26/00 ,  C30B25/02 ,  C30B25/14

CPC分类号： C23C16/45525 ,  C23C16/24 ,  C23C16/45531 ,  C23C16/45536 ,  C23C26/00 ,  C30B25/02 ,  C30B29/68 ,  Y10S438/925

摘要： The thickness of a thin film of an element semiconductor may be determined by counting the number of cycles of gaseous component introductions within a crystal growth vessel. Each cycle permits at most one monolayer of growth since the pressure in the vessel during gaseous component introduction is maintained under a saturation condition. The temperature to which a substrate in the vessel is heated is that for which epitaxial growth results.

摘要翻译： 元件半导体薄膜的厚度可以通过计数在晶体生长容器内的气态组分引入的循环次数来确定。 每个循环允许至多一个单层生长，因为在气体组分引入期间容器中的压力保持在饱和条件下。 加热容器中的基底的温度是导致外延生长的温度。

公开(公告)号：US5693139A

公开(公告)日：1997-12-02

申请号：US77119

申请日：1993-06-15

申请人： Junichi Nishizawa ,  Hitoshi Abe ,  Soubei Suzuki

发明人： Junichi Nishizawa ,  Hitoshi Abe ,  Soubei Suzuki

IPC分类号： C23C16/44 ,  C23C16/455 ,  C30B25/02 ,  C30B25/14 ,  H01L21/20 ,  H01L21/205

CPC分类号： C23C16/45525 ,  C23C16/455 ,  C23C16/45531 ,  C23C16/45536 ,  C30B25/02 ,  C30B25/14 ,  C30B29/42 ,  H01L21/02395 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262

摘要： A cycle of alternately or cyclically introducing external gases containing molecules of component elements of a compound semiconductor to be formed on a substrate is repeated while appropriately controlling the pressure, substrate temperature and gas introduction rate in a crystal growth vessel, so that a monocrystal which is dimensionally as precise as a single monolayer can grow on the substrate by making use of chemical reactions on the heated substrate surface. Doped molecular layer epitaxy of a compound semiconductor comprising individual steps of introducing and evacuating a first source gas, introducing and evacuating a second source gas, and introducing and evacuating an impurity gas which contains an impurity element. The doped impurity concentration varies almost linearly with the pressure during doping in a wide range.

摘要翻译： 在适当地控制晶体生长容器中的压力，衬底温度和气体导入速率的同时，重复交替地或周期性地引入含有要形成在衬底上的化合物半导体的组分元素分子的外部气体的循环，从而使单晶 通过利用加热的基底表面上的化学反应，在单个单层上的尺寸精确地可以在基底上生长。 包括化合物半导体的掺杂分子层外延，其包括引入和排空第一源气体，引入和抽空第二源气体，以及引入和排出含有杂质元素的杂质气体的各个步骤。 掺杂杂质浓度在宽范围内掺杂期间的压力几乎线性变化。

公开(公告)号：US4499654A

公开(公告)日：1985-02-19

申请号：US561120

申请日：1983-12-13

申请人： Junichi Nishizawa ,  Soubei Suzuki ,  Takashige Tamamushi

发明人： Junichi Nishizawa ,  Soubei Suzuki ,  Takashige Tamamushi

IPC分类号： H01L27/146 ,  H01L31/10 ,  H01L21/22 ,  H01L21/265

CPC分类号： H01L27/14692 ,  H01L27/14603 ,  H01L27/14679 ,  H01L27/14687

摘要： A method for forming a semiconductor photodetector array having a matrix of pixels, each constituted by a single SIT (Static Induction Transistor). A field oxide layer is formed on a first main surface of a silicon wafer. Portions of a field oxide layer are then removed from predetermined regions of the first main surface. In these predetermined regions are formed a control gate region and a shielding gate region, with the shielding gate region surrounding the control gate region. Oxide layers are formed on the control gate region and shielding gate region. Portions of the field oxide layer between the control gate region and shielding region are removed to partially expose the first main surface of the silicon wafer, and a first main electrode region is formed in the exposed portion. A first conductive electrode is then deposited on the first main region, whereupon the entirety of the first main surface of the silicon wafer is covered with a first insulating layer. Portions of the first insulating layer are then removed from the control gate region, and the entirety of the first main surface of the silicon wafer is covered with a second insulating layer. A second conductive electrode is then formed on the second insulating layer upon the control gate region. Portions of the first and second insulating layers and the oxide on the shielding gate region are removed to provide a contact hole. The first main surface of the silicon wafer is then covered with a metal layer, portions of which are subsequently removed from the control gate region. Finally, an electrode for the second main electrode region is deposited on the second main surface.

摘要翻译： 一种用于形成具有像素矩阵的半导体光电检测器阵列的方法，每个像素由单个SIT（静态感应晶体管）构成。 在硅晶片的第一主表面上形成场氧化物层。 然后从第一主表面的预定区域去除一部分场氧化物层。 在这些预定区域中形成控制栅极区域和屏蔽栅极区域，屏蔽栅极区域围绕控制栅极区域。 在控制栅极区域和屏蔽栅极区域上形成氧化物层。 除去控制栅极区域和屏蔽区域之间的场氧化物层的一部分以部分地暴露硅晶片的第一主表面，并且在暴露部分中形成第一主电极区域。 然后在第一主区域上沉积第一导电电极，于是硅晶片的第一主表面的整体被第一绝缘层覆盖。 然后从控制栅极区域去除第一绝缘层的部分，并且硅晶片的第一主表面的整体被第二绝缘层覆盖。 然后在控制栅区上在第二绝缘层上形成第二导电电极。 去除第一绝缘层和第二绝缘层的部分和屏蔽栅极区上的氧化物以提供接触孔。 然后用金属层覆盖硅晶片的第一主表面，随后将其部分部分从控制栅极区域移除。 最后，第二主电极区域的电极沉积在第二主表面上。