Mask/wafer control structure and algorithm for placement
    1.
    发明授权
    Mask/wafer control structure and algorithm for placement 失效
    掩模/晶片控制结构和放置算法

    公开(公告)号:US06766507B2

    公开(公告)日:2004-07-20

    申请号:US10121811

    申请日:2002-04-12

    IPC分类号: G06F1750

    摘要: A mask/wafer control structure and an algorithm for placement thereof provide for data placement of measurement control structures, called a PLS, Process limiting Structure, on a mask and a plurality of chips on the wafer which provide for tighter control of both mask manufacture and wafer production by providing the most critical design structures for measurement during creation of the mask, and in the photolithography and etch processes. The PLS structures are located at multiple locations throughout the chip, and so they receive the same data preparation as the chip, and measurement tools are able to measure the same features at each fabrication step from fabrication of the mask to final formation of the etched features. Manufacturing control and the interlock between the wafer fabrication and the mask fabrication are enhanced, allowing for improved quality of the final product.

    摘要翻译: 掩模/晶片控制结构及其放置算法提供在晶片上的掩模和多个芯片上的称为PLS,过程限制结构的测量控制结构的数据放置,其提供对掩模制造和 在制作掩模期间以及在光刻和蚀刻工艺中提供用于测量的最关键的设计结构的晶片生产。 PLS结构位于整个芯片的多个位置,因此它们接收与芯片相同的数据准备,并且测量工具能够在从制造掩模到最终形成蚀刻特征的每个制造步骤处测量相同的特征 。 增强制造控制和晶片制造与掩模制造之间的互锁,从而允许最终产品的质量提高。

    Process for enhanced lithographic imaging
    4.
    发明授权
    Process for enhanced lithographic imaging 失效
    增强光刻成像的过程

    公开(公告)号:US06383719B1

    公开(公告)日:2002-05-07

    申请号:US09081456

    申请日:1998-05-19

    IPC分类号: G03F720

    摘要: Fine feature lithography is enhanced by selectively providing exposures to correct for effects such as foreshortening, corner rounding, nested to isolated print bias, feature size dependent bias, and other image biases in semiconductor processing. These results are achieved by increasing the local exposure dose in critical areas of specific images, such as line ends and corners. The general process incorporates techniques which tailor the exposure dose as a function of position to achieve the desired final image shape. The techniques include contrast enhancement layers (CEL), scanning optical beams, and exposures with different masks. In one embodiment the process of forming a pattern comprises the steps of providing a substrate having a photosensitive coating, exposing the center area of the pattern on the photosensitive coating with one mask, and exposing ends of the pattern on the photosensitive coating without exposing the center area with a second mask. The second exposure overlaps the first exposure and may extend beyond the pattern but the second dose is much lower than the first dose.

    摘要翻译: 通过选择性地提供曝光以校正诸如缩短,拐角舍入,嵌套到隔离印刷偏移,特征尺寸依赖偏置和半导体处理中的其他图像偏移的效果来增强精细特征光刻。 这些结果通过增加特定图像的关键区域(例如线端和角)的局部曝光剂量来实现。 一般过程包括将曝光剂量定制为位置的函数以实现期望的最终图像形状的技术。 这些技术包括对比度增强层(CEL),扫描光束和具有不同掩模的曝光。 在一个实施方案中,形成图案的方法包括以下步骤:提供具有感光涂层的基底,用一个掩模曝光在感光涂层上的图案的中心区域,以及将图案的端部暴露在感光涂层上,而不暴露中心 区域与第二个掩模。 第二次暴露与第一次暴露重叠,并且可能延伸超出模式,但是第二次剂量比第一次剂量低得多。

    Method and apparatus for adjusting a tilt of a lithography tool
    5.
    发明授权
    Method and apparatus for adjusting a tilt of a lithography tool 失效
    用于调整光刻工具倾斜的方法和装置

    公开(公告)号:US06278515B1

    公开(公告)日:2001-08-21

    申请号:US09650423

    申请日:2000-08-29

    IPC分类号: G03B2752

    CPC分类号: G03F7/70641 G03F9/7034

    摘要: A method and apparatus according to the present invention achieves improved lithographic printing of semiconductor wafers. An optimum tilt for projection optics in a lithography tool relative to a wafer in a direction perpendicular to a scanning direction is characterized for each of a plurality of wafer technologies and levels. The corresponding optimum tilt is retrieved from a database to adjust the lithography tool accordingly, depending upon what technology and level is being processed.

    摘要翻译: 根据本发明的方法和装置实现了半导体晶片的改进的平版印刷。 光刻工具中相对于晶片在垂直于扫描方向的方向上的投影光学器件的最佳倾斜的特征在于多个晶片技术和级别中的每一个。 根据正在处理的技术和级别,从数据库检索相应的最佳倾斜度以相应地调整光刻工具。