CONSTANT-VELOCITY JOINT ASSEMBLY
    2.
    发明申请
    CONSTANT-VELOCITY JOINT ASSEMBLY 有权
    恒速联合总成

    公开(公告)号:US20140113734A1

    公开(公告)日:2014-04-24

    申请号:US14119601

    申请日:2012-04-09

    IPC分类号: F16D3/32

    摘要: A constant-velocity joint assembly includes: a first and a second shaft portions respectively provided with a protrusion; a double yoke portion in which a guide hole is formed along an axis direction, the first and the second shaft portions being respectively rotatably connected to both sides of the guide hole with an axis of an upper/lower direction; and a guide portion which is disposed to the guide hole to guide the protrusion and rotates along an inner circumference of the guide hole during rotation of the shaft portions, wherein the first and the second shaft portions respectively comprises: a spider body, a left and a right leg, and an upper and a lower legs; a shaft provided with the protrusion; and a yoke block comprising a block body, and a left and a right connecting member.

    摘要翻译: 恒速接头组件包括:分别设置有突起的第一和第二轴部; 沿着轴方向形成有导向孔的双轭部,所述第一轴部和所述第二轴部分分别以所述上下方向的轴线可旋转地连接在所述引导孔的两侧; 以及引导部,其设置在所述引导孔中,以在所述轴部旋转期间引导所述突起并沿着所述引导孔的内周旋转,其中所述第一和第二轴部分别包括:蜘蛛体, 右腿,上腿和下腿; 设置有突起的轴; 以及包括块体的轭块,以及左右连接构件。

    SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 审中-公开
    半导体器件及其形成方法

    公开(公告)号:US20070181880A1

    公开(公告)日:2007-08-09

    申请号:US11672893

    申请日:2007-02-08

    申请人: Sung-Bong KIM

    发明人: Sung-Bong KIM

    IPC分类号: H01L29/10 H01L21/84

    摘要: A semiconductor device includes a conductive layer formed on a semiconductor substrate. An insulation layer is formed on the conductive layer and includes an opening defined therein that exposes the conductive layer. A semiconductor pattern is formed on the insulation layer and is electrically connected to the conductive layer through the opening. A transistor is formed on the semiconductor pattern.

    摘要翻译: 半导体器件包括形成在半导体衬底上的导电层。 绝缘层形成在导电层上,并且包括露出导电层的开口。 半导体图案形成在绝缘层上,并通过开口与导电层电连接。 在半导体图案上形成晶体管。

    Layouts for CMOS SRAM cells and devices
    4.
    发明授权
    Layouts for CMOS SRAM cells and devices 有权
    CMOS SRAM单元和器件的布局

    公开(公告)号:US06870231B2

    公开(公告)日:2005-03-22

    申请号:US10292180

    申请日:2002-11-12

    CPC分类号: H01L27/11 H01L27/1104

    摘要: SRAM cells and devices are provided. The SRAM cells may share connections with neighboring cells, including ground, power supply voltage and/or bit line connections. SRAM cells and devices are also provided that include first and second active regions disposed at a semiconductor substrate. Parallel first and second gate electrodes cross over the first and second active regions. One end of the first active region adjacent to the first gate electrode is electrically connected to the second active region adjacent to the first gate electrode through a first node line parallel to the first gate electrode, and the other end of the first active region adjacent to the second gate electrode is electrically connected to the second active region adjacent to the second gate electrode through a second node line parallel to the second gate electrode. The first node line is electrically connected to the second gate electrode through a first local interconnection crossing over the first node line, and the second node line is electrically connected to the first gate electrode through a second local interconnection crossing over the second node line. Additionally, a word line may be in direct contact with gate electrodes of transfer transistors of the SRAM cells.

    摘要翻译: 提供SRAM单元和器件。 SRAM单元可以与相邻单元共享连接,包括地,电源电压和/或位线连接。 还提供了包括设置在半导体衬底上的第一和第二有源区的SRAM单元和器件。 平行的第一和第二栅电极跨过第一和第二有源区。 与第一栅极相邻的第一有源区的一端通过与第一栅电极平行的第一节点线与第一栅电极相邻的第二有源区电连接,并且与第一有源区相邻的第一有源区的另一端 第二栅电极通过与第二栅电极平行的第二节点线电连接到与第二栅电极相邻的第二有源区。 第一节点线通过跨第一节点线的第一局部互连电连接到第二栅极电极,并且第二节点线通过跨第二节点线的第二局部互连电连接到第一栅电极。 此外,字线可以与SRAM单元的转移晶体管的栅电极直接接触。

    Methods of fabricating integrated circuits including metal silicide contacts extending between a gate electrode and a source/drain region
    5.
    发明授权
    Methods of fabricating integrated circuits including metal silicide contacts extending between a gate electrode and a source/drain region 有权
    制造集成电路的方法包括在栅极电极和源极/漏极区域之间延伸的金属硅化物触点

    公开(公告)号:US06169020A

    公开(公告)日:2001-01-02

    申请号:US09137598

    申请日:1998-08-21

    IPC分类号: H01L2120

    CPC分类号: H01L21/76895 Y10S257/90

    摘要: The presence and absence of sidewall spacers are used to provide discontinuous and continuous contacts respectively, between a gate electrode and a source/drain region. In particular, first and second spaced apart gate electrodes are formed on an integrated circuit substrate. A source/drain region is formed in the integrated circuit substrate therebetween. The first electrode includes a first sidewall spacer on a first sidewall thereof facing the second gate electrode. The second gate electrode is free of (i.e. does not include) a sidewall spacer on a second sidewall thereof facing the first electrode. A metal silicide layer is formed on the first gate electrode, on the second gate electrode and extending from the second gate electrode onto the second sidewall and onto the source/drain region. The first sidewall spacer is free of the metal silicide layer thereon. The metal suicide layer is preferably formed by forming a metal layer on the first gate electrode, on the first sidewall spacer, on the source/drain region, on the second sidewall and on the second gate electrode. The metal layer is reacted with the first gate electrode, the source/drain region, the second sidewall and the second gate layer, to thereby form the metal silicide layer on the first gate electrode, on the second gate electrode and extending from the second gate electrode onto the second sidewall and onto the source/drain region. The metal layer is then removed from the first sidewall spacer.

    摘要翻译: 侧壁间隔物的存在和不存在分别用于在栅极电极和源极/漏极区域之间提供不连续和连续的触点。 特别地,第一和第二间隔开的栅电极形成在集成电路基板上。 源极/漏极区域形成在其间的集成电路基板中。 第一电极包括在其面向第二栅电极的第一侧壁上的第一侧壁间隔物。 第二栅极电极在其面向第一电极的第二侧壁上没有(即不包括)侧壁间隔物。 金属硅化物层形成在第一栅电极上,在第二栅电极上并且从第二栅电极延伸到第二侧壁上并且在源/漏区上延伸。 第一侧壁间隔物上没有金属硅化物层。 金属硅化物层优选通过在第一侧壁间隔,第一侧壁间隔物,源极/漏极区域,第二侧壁和第二栅电极上形成金属层而形成。 金属层与第一栅极电极,源极/漏极区域,第二侧壁和第二栅极层反应,从而在第一栅电极上,在第二栅电极上形成金属硅化物层,并从第二栅极延伸 电极到第二侧壁上并且到达源极/漏极区域。 然后从第一侧壁间隔物去除金属层。

    Collapsible Carrying Strap
    7.
    发明申请
    Collapsible Carrying Strap 审中-公开
    可折叠携带

    公开(公告)号:US20090174203A1

    公开(公告)日:2009-07-09

    申请号:US12345823

    申请日:2008-12-30

    申请人: Sung Bong Kim

    发明人: Sung Bong Kim

    IPC分类号: A45F5/00

    摘要: A handle/strap device is disclosed that is suitable for original or retrofit installation onto edge surfaces of portable devices such as notebook computers and portable DVD players and the like. The handle/strap is made up of a base plate to which a pair of complementary upper and lower channel shaped leaf elements are pivotally attached at respective ends thereof. A longitudinal cavity is created in between the folded channel shapes when the device is in the shape of a handle. However, the upper channel can be unlatched from the lower channel so as to release the extendable/adjustable strap contained therein.

    摘要翻译: 公开了一种适于在诸如笔记本电脑和便携式DVD播放器等的便携式设备的边缘表面上的原始或改装的手柄/带装置。 手柄/皮带由基板构成,一对互补的上,下通道形状的叶元件在其相应端部处可枢转地附接到该基板。 当设备处于手柄形状时,在折叠通道形状之间产生纵向空腔。 然而,上通道可以从下通道解锁,以便释放其中包含的可延伸/可调节的带。

    Iris for photographing apparatus
    8.
    发明申请
    Iris for photographing apparatus 审中-公开
    虹膜用于拍摄设备

    公开(公告)号:US20080089679A1

    公开(公告)日:2008-04-17

    申请号:US11797729

    申请日:2007-05-07

    IPC分类号: G03B9/02

    摘要: Provided is an iris for a photographing apparatus. The iris includes a plate, a plurality of iris wings, a motor, and a filter unit. The plate includes a transmission hole therein. The plurality of iris wings are movably provided on one side of the plate. The motor provides power used to move the iris wings. The filter unit is provided inside the iris wings to control an amount of transmitted light that passes through the transmission hole, and the filter unit is at least portions of the iris wings.

    摘要翻译: 提供了一种用于拍摄设备的虹膜。 虹膜包括板,多个虹膜翼,马达和过滤器单元。 该板在其中包括一个传输孔。 多个虹膜翼可移动地设置在板的一侧上。 电机提供用于移动虹膜机翼的电源。 过滤器单元设置在虹膜翼内部以控制穿过透射孔的透射光量,并且过滤器单元是虹膜翼的至少一部分。

    Unitary interconnection structures integral with a dielectric layer and fabrication methods thereof
    9.
    发明授权
    Unitary interconnection structures integral with a dielectric layer and fabrication methods thereof 有权
    与介电层一体化的单一互连结构及其制造方法

    公开(公告)号:US07312144B2

    公开(公告)日:2007-12-25

    申请号:US10932416

    申请日:2004-09-02

    IPC分类号: H01L21/4763

    摘要: An interconnection structure is provided by forming a first damascene interconnect structure that directly connects a first active area in a substrate, a first conductive line on the substrate and/or a first electrode on the substrate with a second active area in the substrate, a second conductive line on the substrate and/or a second electrode on the substrate. A second damascene interconnect structure may directly connect the first active area, the first conductive line and/or the first electrode to the second active area, the second conductive line and/or the second electrode. The first active area, the first conductive line and/or the first electrode connected to the second active area, the second conductive line and/or the second electrode by the first damascene interconnect structure may be different from the first active area, the first conductive line and/or the first electrode and the second active area, the second conductive line and/or the second electrode connected by the second damascene interconnect structure.

    摘要翻译: 通过形成第一镶嵌互连结构来提供互连结构,所述第一镶嵌互连结构直接连接衬底中的第一有源区,衬底上的第一导电线和/或衬底上的第一电极,在衬底中具有第二有源区, 导电线和/或基板上的第二电极。 第二镶嵌互连结构可以将第一有源区,第一导线和/或第一电极直接连接到第二有源区,第二导线和/或第二电极。 第一有源区域,第一导电线路和/或连接到第二有源区域的第一电极,第一导电线路和/或第二电极通过第一镶嵌互连结构可以不同于第一有源区域,第一导电 线路和/或第一电极和第二有源区域,第二导电线路和/或第二电极通过第二镶嵌互连结构连接。