公开(公告)号：US4853753A

公开(公告)日：1989-08-01

申请号：US117583

申请日：1987-11-05

申请人： Federico Capasso ,  Alfred Y. Cho ,  Susanta Sen

发明人： Federico Capasso ,  Alfred Y. Cho ,  Susanta Sen

IPC分类号： G11C11/38 ,  G11C11/56 ,  H01L27/10 ,  H01L29/76 ,  H01L29/80 ,  H01L29/88 ,  H03B19/16

CPC分类号： B82Y10/00 ,  G11C11/38 ,  G11C11/56 ,  H01L29/7606 ,  H01L29/882 ,  H03B19/16 ,  G11C2211/5614 ,  Y10S257/926

摘要： A semiconductor integrated resonant-tunneling device having multiple negative-resistance regions, and having essentially equal current peaks in such regions, is useful as a highly compact element, e.g., in apparatus designed for ternary logic operations, frequency multiplication, waveform scrambling, memory operation, parity-bit generation, and coaxial-line driving. The device can be made by layer deposition on a substrate and includes a resonant-tunneling structure between contacts such that side-by-side first and third contacts are on one side, and a second contact is on the opposite side of the resonant-tunneling structure. Disclosed further are (two-terminal) resonant-tunneling diodes as incorporated in memory devices, e.g., in lieu of 2-transistsor flip-flops; room-temperature device operation; and devices comprising an essentially undoped accelerator region between an emitter contact and a resonant-tunneling structure.

摘要翻译： 具有多个负电阻区域并且在这些区域中具有基本相等的电流峰值的半导体集成谐振隧道装置可用作高度紧凑的元件，例如在设计用于三元逻辑运算，倍频，波形加扰，存储器操作 奇偶校验位产生和同轴线驱动。 该器件可以通过在衬底上的层沉积制成，并且包括在触点之间的谐振隧穿结构，使得并排的第一和第三触点在一侧，并且第二触点位于谐振隧道的相反侧 结构体。 还公开了（二端）谐振隧道二极管，如并入存储器件中，例如代替2-转移触发器; 室温装置操作; 以及包括在发射极接触和谐振隧道结构之间的基本上未掺杂的加速器区域的器件。

公开(公告)号：US4999697A

公开(公告)日：1991-03-12

申请号：US244753

申请日：1988-09-14

申请人： Federico Capasso ,  Alfred Y. Cho ,  Susanta Sen

发明人： Federico Capasso ,  Alfred Y. Cho ,  Susanta Sen

IPC分类号： H01L29/73 ,  G06F11/10 ,  G11C11/56 ,  H01L21/20 ,  H01L21/203 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L29/08 ,  H01L29/201 ,  H01L29/205 ,  H01L29/737 ,  H03B19/14 ,  H03M1/34 ,  H03M1/36

CPC分类号： B82Y10/00 ,  G06F11/10 ,  G11C11/56 ,  H01L29/0895 ,  H01L29/205 ,  H01L29/7376 ,  H03B19/14 ,  H03M1/368 ,  G11C2211/5614

摘要： A plurality of decoupled quantum wells in a transistor device enables such device to operate with multiple-peak characteristics. The device is suitable for a variety of circuit applications in switching systems and in central processor logic units and memories; specific applications include frequency multipliers, waveform scramblers, parity-bit generators, analog-to digital converters, and multiple-valued logic units.

公开(公告)号：US4902912A

公开(公告)日：1990-02-20

申请号：US366340

申请日：1989-06-13

申请人： Federico Capasso ,  Alfred Y. Cho ,  Susanta Sen ,  Masakazu Shoji ,  Deborah Sivco

发明人： Federico Capasso ,  Alfred Y. Cho ,  Susanta Sen ,  Masakazu Shoji ,  Deborah Sivco

IPC分类号： G11C11/56 ,  H01L29/76 ,  H01L29/88 ,  H03B19/16

CPC分类号： B82Y10/00 ,  B82Y30/00 ,  G11C11/56 ,  H01L29/7606 ,  H01L29/882 ,  H03B19/16 ,  G11C2211/5614

摘要： A semiconductor integrated resonant-tunneling device having multiple negative-resistance regions, and having essentially equal current peaks in such regions, is useful as a highly compact element, e.g., in apparatus designed for ternary logic operations, frequency multiplication, waveform scrambling, memory operation, parity-bit generation, and coaxial-line driving. The device can be made by layer deposition on a substrate and includes a resonant-tunneling structure between contacts such that side-by-side first and third contacts are on one side, and a second contact is on the opposite side of the resonant-tunneling structure.

摘要翻译： 具有多个负电阻区域并且在这些区域中具有基本相等的电流峰值的半导体集成谐振隧道装置可用作高度紧凑的元件，例如在设计用于三元逻辑运算，倍频，波形加扰，存储器操作 奇偶校验位产生和同轴线驱动。 该器件可以通过在衬底上的层沉积制成，并且包括在触点之间的谐振隧穿结构，使得并排的第一和第三触点在一侧，并且第二触点位于谐振隧道的相反侧 结构体。