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公开(公告)号：US20040262494A1
公开(公告)日：2004-12-30
申请号：US10873110
申请日：2004-06-23
发明人： Yuichi Egawa , Akira Fukami
IPC分类号： H01L021/00 , H01L027/00 , H04N003/14
CPC分类号： H01L27/14687 , H01L27/14603 , H01L27/14609 , H01L27/148
摘要： This invention provides a solid-state imaging device which enables its cell area to be reduced while maintaining a light receiving area. First, a plurality of isolation areas are formed in a semiconductor substrate. Then, p-type well is formed by implanting p-type impurity into the interior organization of an active area surrounded by the isolation areas. Next, by using ion implantation method, a charge accumulating area, which is a n-type semiconductor area, is formed deep in the p-type well. Consequently, photo diode is formed in a deep portion apart from the surface of the semiconductor substrate. After that, an electric transferring MIS transistor is formed above and apart from the charge accumulating area, so that the photo diode and the MIS transistor are formed in a vertical structure.
摘要翻译： 本发明提供了一种固态成像装置，其能够在保持光接收面积的同时减小其单元面积。 首先，在半导体衬底中形成多个隔离区。 然后，通过将p型杂质注入到由隔离区包围的有源区域的内部组织中形成p型阱。 接下来，通过使用离子注入法，在p型阱中深深地形成作为n型半导体区域的电荷蓄积区域。 因此，光电二极管形成在远离半导体衬底的表面的深部分中。 之后，在电荷累积区域上方形成电转移MIS晶体管，使得光电二极管和MIS晶体管形成为垂直结构。
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公开(公告)号：US20040238968A1
公开(公告)日：2004-12-02
申请号：US10853255
申请日：2004-05-26
发明人： Kenji Tokunaga
IPC分类号： H01L023/48
CPC分类号： H01L24/10 , H01L23/522 , H01L23/53238 , H01L24/02 , H01L24/13 , H01L2224/0401 , H01L2224/13 , H01L2224/13099 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/12044 , H01L2924/1306 , H01L2924/30105 , H01L2924/00
摘要： In a semiconductor device manufacturing process using a low-dielectric-constant insulation film as an interlayer insulation film, a stress exerted on wiring layers and interlayer insulation films is reduced. In a semiconductor device in which a plurality of buried wiring layers are formed in the interlayer insulation films each formed of a low- dielectric-constant insulation film lower in mechanical strength than a silicone oxide film formed by, for example, a CVD method, a first layer of wiring, on a lower layer of which a low-dielectric-constant insulation film is not disposed, serves as a bonding pad, and bump electrodes are formed on the wiring so as to become higher than a position where the uppermost buried wiring is formed.
摘要翻译： 在使用低介电常数绝缘膜作为层间绝缘膜的半导体器件制造工艺中，施加在布线层和层间绝缘膜上的应力减小。 在这样的层间绝缘膜中形成多层掩埋布线层的半导体器件中，所述层间绝缘膜由比通过CVD法形成的硅氧烷膜低的机械强度的低介电常数绝缘膜形成， 第一层布线在其不设置低介电常数绝缘膜的下层上用作接合焊盘，并且在布线上形成凸起电极，以使其高于最上面的掩埋布线 形成了。
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3.发明申请Wet processing apparatus, wet processing method and manufacturing method of semiconductor device 审中-公开湿式加工装置，湿式加工方法及半导体装置的制造方法公开(公告)号：US20040262265A1
公开(公告)日：2004-12-30
申请号：US10875826
申请日：2004-06-25
IPC分类号： C23F001/00 , B44C001/22 , C03C015/00 , H01L031/0232
CPC分类号： H01L21/67115 , H01L21/31111 , H01L21/67086
摘要： A manufacturing method of semiconductor device capable of suppressing or preventing formation of a dissolution region of composition atoms such as a pit in a semiconductor wafer. After oxide film on a semiconductor wafer is removed by dipping plural pieces of the semiconductor wafer accommodated in a carrier into chemical liquid containing fluoro acid, chemical liquid adhering to the semiconductor wafer is washed out of the semiconductor wafer by rinse processing using de-ionized water. At least in the rinse processing of this wet processing, light is projected to the semiconductor wafer from a light source provided on a wet etching apparatus. Adjusting electromotive force caused by battery reaction at a pn junction of the semiconductor wafer by adjusting the state of the light L enables generation of a pit in the semiconductor wafer.
摘要翻译： 一种半导体器件的制造方法，其能够抑制或防止半导体晶片中的凹坑等成分原子的溶解区域的形成。 通过将容纳在载体中的多个半导体晶片浸渍在含有氟酸的化学液中，去除半导体晶片上的氧化物膜后，通过使用去离子水的冲洗处理将附着在半导体晶片上的化学液体从半导体晶片中冲洗掉 。 至少在这种湿法处理的漂洗处理中，光从设置在湿蚀刻装置上的光源投射到半导体晶片。 通过调节光L的状态来调节由半导体晶片的pn结处的电池反应引起的电动势，能够在半导体晶片中产生凹坑。
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4.发明申请Manufacturing method of semiconductor device, automatic operation method and automatic operation system of semiconductor manufacturing apparatus, and automatic operation method of CMP apparatus 审中-公开半导体装置的制造方法，半导体制造装置的自动操作方法和自动操作系统以及CMP装置的自动操作方法公开(公告)号：US20040203321A1
公开(公告)日：2004-10-14
申请号：US10820782
申请日：2004-04-09
IPC分类号： B24B049/12
CPC分类号： B24B37/345 , B24B49/02 , B24B51/00
摘要： In a semiconductor manufacturing process such as the CMP process with the large ratio of manual work, the automation is promoted in order to achieve the rationalization and the manpower reduction, the improvement of the processing ability, the reduction of the investment amount, and the improvement of the indirect operation efficiency. By just downloading the process recipe of the product wafer from the host computer to the CMP apparatus in the CMP process, the dummy wafer is processed under the predetermined process condition before processing the product wafer. In this manner, the unmanned operation can be achieved. In addition, the measurement data of the film thickness measuring device mounted to the unmanned CMP apparatus is transmitted together with such process data as the polishing time from the CMP apparatus to the host computer. By doing so, the recipe condition of the CMP apparatus can be changed based on the latest data, and the process condition of the subsequent process is used in the feedforward manner based on the film thickness measurement data. In this manner, it is possible to eliminate the measurement process in the subsequent process.
摘要翻译： 在手工作业比例大的CMP工艺等半导体制造工艺中，为了实现合理化和人力的降低，加工能力的提高，投入量的减少和改善，实现了自动化 的间接运营效率。 通过在CMP工艺中将主产品晶片的工艺配方下载到CMP装置，在处理产品晶片之前，在预定的工艺条件下处理虚设晶片。 以这种方式，可以实现无人操作。 此外，安装到无人化CMP装置的膜厚测量装置的测量数据与从CMP装置到主计算机的抛光时间的处理数据一起发送。 通过这样做，可以基于最新数据改变CMP装置的配方条件，并且基于膜厚测量数据以前馈方式使用后续处理的处理条件。 以这种方式，可以消除后续处理中的测量过程。
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公开(公告)号：US20040227160A1
公开(公告)日：2004-11-18
申请号：US10845290
申请日：2004-05-12
发明人： Shingo Nasu , Tomio Iwasaki , Hiroyuki Ohta , Yukihiro Kumagai , Shuji Ikeda
IPC分类号： H01L027/10
CPC分类号： H01L29/167 , H01L21/2807 , H01L29/1004 , H01L29/1054 , H01L29/4966 , H01L29/7378
摘要： In semiconductor devices, a semiconductor device is provided which is high in reliability while suppressing changes in characteristics such as threshold voltages. In a semiconductor device which has a gate dielectric film above a semiconductor substrate and also has above the gate dielectric film a gate electrode film made of silicon germanium chosen as its main constituent material, or alternatively in a semiconductor device which has beneath the gate dielectric film a channel made of silicon as its main constituent material and which has below the channel a channel underlayer film made of silicon germanium as its main constituent material, a specifically chosen dopant, such as cobalt (Co) or carbon (C) or nitrogen (N), is added to the gate electrode and the channel underlayer film, for use as the unit for suppressing diffusion of germanium in the gate electrode or in the channel underlayer film.
摘要翻译： 在半导体器件中，提供了一种在抑制诸如阈值电压的特性变化的同时高可靠性的半导体器件。 在半导体器件中，在半导体衬底上方具有栅极电介质膜，并且还具有栅极电介质膜上方的由选择为主要构成材料的硅锗制成的栅电极膜，或者替代地在栅极电介质膜下方的半导体器件 由硅作为其主要构成材料的通道，并且在通道下方具有由硅锗作为其主要构成材料的沟道下层膜，特别选择的掺杂剂，例如钴（Co）或碳（C）或氮（N ）添加到栅极电极和沟道下层膜中，用作抑制栅极电极或沟道下层膜中锗扩散的单元。
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公开(公告)号：US20040214413A1
公开(公告)日：2004-10-28
申请号：US10829382
申请日：2004-04-22
IPC分类号： H01L021/20
CPC分类号： C23C16/4405 , C23C16/4404
摘要： By-products inside a furnace body of a CVD film forming apparatus after gas cleaning is performed in the furnace body are provided from being generated. The gas cleaning is performed in the furnace body by a plasma of a gas containing a halogen system gas and an Ar gas in an atmosphere in which the temperature of a heater disposed in the furnace body is approximately 500null C. or lower. Thereafter, a rise of the temperature of the heater is started. While the temperature of the heater is maintained constant, a film forming gas is introduced into the furnace body during a time period before the raised temperature reaches a temperature at which radicals or ions of a halogen system element are activated. Thereby, thin films are formed on the inner wall of the furnace body and the surfaces of members including the heater in the furnace body
摘要翻译： 在炉体中进行气体净化后的CVD成膜装置的炉体内的副产物被生成。 通过在炉体内配置的加热器的温度为约500℃以下的气氛中，通过含有卤素体系气体和Ar气体的气体的等离子体在炉体中进行气体清洗。 此后，开始加热器的温度升高。 在加热器的温度保持恒定的同时，在升高的温度达到卤素系元素的自由基或离子被激活的温度之前的时间段内，将成膜气体引入炉体。 由此，在炉体的内壁和炉体内具有加热器的部件的表面形成有薄膜
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