Efficient interrupt message definition
    1.
    发明授权
    Efficient interrupt message definition 有权
    高效的中断消息定义

    公开(公告)号:US07783811B2

    公开(公告)日:2010-08-24

    申请号:US12002442

    申请日:2007-12-17

    IPC分类号: G06F13/24 G06F13/32

    CPC分类号: G06F13/24

    摘要: An efficient interrupt system for a multi-processor computer. Devices interrupt a processor or group of processors using pre-defined message address and data payload communicated with a memory write transaction over a PCI, PCI-X, or PCI Express bus. The devices are configured with messages that each targets a processor. Upon receiving a command to perform an operation, the device may receive an indication of a preferred message to use to interrupt a processor upon completion of that operation. The efficiency with which each interrupt is handled and the overall efficiency of operation of the computer is increased by defining messages for the devices within the computer so that each device contains messages targeting processors distributed across groups of processors, with each group representing processors in close proximity. In selecting target processors for messages, processors are selected to spread processing across the processor groups and across processors within each group.

    摘要翻译: 用于多处理器计算机的高效中断系统。 设备使用通过PCI,PCI-X或PCI Express总线与存储器写入事务通信的预定义消息地址和数据有效负载中断处理器或处理器组。 这些设备配置有各自针对处理器的消息。 在接收到执行操作的命令时,该设备可以在该操作完成时接收用于中断处理器的优选消息的指示。 处理每个中断的效率和计算机的整体运行效率通过为计算机内的设备定义消息而增加,使得每个设备包含针对分布在处理器组之间的处理器的消息,每个组表示处理器接近 。 在选择消息的目标处理器时,选择处理器来跨处理器组和每个组内的处理器扩展处理。

    System and method for testing, simulating, and controlling computer software and hardware
    2.
    发明申请
    System and method for testing, simulating, and controlling computer software and hardware 失效
    用于测试,模拟和控制计算机软件和硬件的系统和方法

    公开(公告)号:US20050015702A1

    公开(公告)日:2005-01-20

    申请号:US10435481

    申请日:2003-05-08

    IPC分类号: H03M13/00

    摘要: A system and method for providing an extensibility model to create device simulators. The system and method provide a generalized framework for the simulation of hardware devices controlled by software drivers with user and kernel mode programmability. The present invention also provides a framework that facilitates communication between applications operating user address space of an operating system and device drivers and device simulators operating in kernel mode address space of the operating system. In one embodiment, a framework provides a bi-directional communication channel that allows a test application in user address space of an operating system to communicate with a computer component operating in kernel address space of the operating system.

    摘要翻译: 一种用于提供可扩展性模型以创建设备模拟器的系统和方法。 该系统和方法为用户和内核模式可编程性的软件驱动程序控制的硬件设备的仿真提供了一个通用框架。 本发明还提供一种框架,其有助于操作操作系统的用户地址空间的应用与在操作系统的内核模式地址空间中操作的设备驱动器和设备模拟器之间的通信。 在一个实施例中,框架提供允许操作系统的用户地址空间中的测试应用与在操作系统的内核地址空间中操作的计算机组件进行通信的双向通信信道。

    Efficient interrupt message definition
    8.
    发明申请
    Efficient interrupt message definition 有权
    高效的中断消息定义

    公开(公告)号:US20090157935A1

    公开(公告)日:2009-06-18

    申请号:US12002442

    申请日:2007-12-17

    IPC分类号: G06F13/24

    CPC分类号: G06F13/24

    摘要: An efficient interrupt system for a multi-processor computer. Devices interrupt a processor or group of processors using pre-defined message address and data payload communicated with a memory write transaction over a PCI, PCI-X, or PCI Express bus. The devices are configured with messages that each targets a processor. Upon receiving a command to perform an operation, the device may receive an indication of a preferred message to use to interrupt a processor upon completion of that operation. The efficiency with which each interrupt is handled and the overall efficiency of operation of the computer is increased by defining messages for the devices within the computer so that each device contains messages targeting processors distributed across groups of processors, with each group representing processors in close proximity. In selecting target processors for messages, processors are selected to spread processing across the processor groups and across processors within each group.

    摘要翻译: 用于多处理器计算机的高效中断系统。 设备使用通过PCI,PCI-X或PCI Express总线与存储器写入事务通信的预定义消息地址和数据有效负载中断处理器或处理器组。 这些设备配置有各自针对处理器的消息。 在接收到执行操作的命令时,该设备可以在该操作完成时接收用于中断处理器的优选消息的指示。 处理每个中断的效率和计算机的整体运行效率通过为计算机内的设备定义消息来增加,使得每个设备包含针对分布在处理器组之间的处理器的消息,每个组表示处理器接近 。 在选择消息的目标处理器时,选择处理器来跨处理器组和每个组内的处理器扩展处理。

    System and method for testing, simulating, and controlling computer software and hardware
    9.
    发明授权
    System and method for testing, simulating, and controlling computer software and hardware 失效
    用于测试,模拟和控制计算机软件和硬件的系统和方法

    公开(公告)号:US07181382B2

    公开(公告)日:2007-02-20

    申请号:US10435481

    申请日:2003-05-08

    摘要: A system and method for providing an extensibility model to create device simulators. The system and method provide a generalized framework for the simulation of hardware devices controlled by software drivers with user and kernel mode programmability. The present invention also provides a framework that facilitates communication between applications operating user address space of an operating system and device drivers and device simulators operating in kernel mode address space of the operating system. In one embodiment, a framework provides a bi-directional communication channel that allows a test application in user address space of an operating system to communicate with a computer component operating in kernel address space of the operating system.

    摘要翻译: 一种用于提供可扩展性模型以创建设备模拟器的系统和方法。 该系统和方法为用户和内核模式可编程性的软件驱动程序控制的硬件设备的仿真提供了一个通用框架。 本发明还提供一种框架,其有助于操作操作系统的用户地址空间的应用与在操作系统的内核模式地址空间中操作的设备驱动器和设备模拟器之间的通信。 在一个实施例中,框架提供允许操作系统的用户地址空间中的测试应用与在操作系统的内核地址空间中操作的计算机组件进行通信的双向通信信道。