公开(公告)号：US20060270240A1

公开(公告)日：2006-11-30

申请号：US11458064

申请日：2006-07-17

申请人： Neal Rueger ,  William Budge ,  Weimin Li

发明人： Neal Rueger ,  William Budge ,  Weimin Li

IPC分类号： H01L21/302

CPC分类号： H01L21/76235

摘要： A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.

摘要翻译： 一种方法，包括在等离子体加热操作之前，在涂覆有绝缘体的结构上形成衬垫。 以及一种方法，包括在衬底上形成沟槽，在沟槽上形成绝缘体，并且在形成绝缘体上具有介于约50埃至约400埃之间的厚度的衬垫之后，对衬底施加等离子体加热操作。

公开(公告)号：US07067415B2

公开(公告)日：2006-06-27

申请号：US10205930

申请日：2002-07-25

申请人： Weimin Li ,  Zhiping Yin ,  William Budge

发明人： Weimin Li ,  Zhiping Yin ,  William Budge

IPC分类号： H01L21/4763 ,  H01L21/31 ,  H01L21/477

CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

摘要： A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.

公开(公告)号：US20060125043A1

公开(公告)日：2006-06-15

申请号：US11009665

申请日：2004-12-10

申请人： John Smythe ,  William Budge

发明人： John Smythe ,  William Budge

IPC分类号： H01L29/00 ,  H01L21/76

CPC分类号： H01L21/76224

摘要： A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a liner layer preferably is deposited into the trench. An anisotropic plasma process is then performed on the trench. A silicon layer may be deposited on the base of the trench during the plasma process, or the plasma can treat the liner layer. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator, and oxidizing the silicon rich layer on the base of the trench. The resulting trench has a consistent etch rate from top to bottom of the trench.

摘要翻译： 提供了将电介质材料沉积到亚微米空间和结构中的方法。 在晶片的表面中蚀刻沟槽之后，衬垫层优选沉积到沟槽中。 然后在沟槽上进行各向异性等离子体处理。 在等离子体工艺期间，硅层可以沉积在沟槽的基底上，或等离子体可以处理衬层。 然后用旋涂前体填充沟槽。 然后施加致密化或反应过程以将旋涂材料转化成绝缘体，并且氧化沟槽底部的富硅层。 所得到的沟槽具有从沟槽的顶部到底部的一致的蚀刻速率。

公开(公告)号：US20050035418A1

公开(公告)日：2005-02-17

申请号：US10925865

申请日：2004-08-25

申请人： William Budge ,  Gurtej Sandhu ,  Christopher Hill

发明人： William Budge ,  Gurtej Sandhu ,  Christopher Hill

IPC分类号： H01L21/316 ,  H01L21/8238 ,  H01L31/062

CPC分类号： H01L21/02164 ,  H01L21/02271 ,  H01L21/02307 ,  H01L21/31612 ,  H01L21/823835 ,  H01L21/823842 ,  H01L21/823864 ,  Y10S438/911

摘要： A process for selectively depositing a silicon oxide layer onto silicon substrates of different conductivity types is disclosed. The silicon oxide layer is formed by the ozone decomposition of TEOS at relatively low temperatures and relatively high pressures. Use of the process to produce layers, spacers, memory units, and gates is also disclosed, as well as the structures so produced.

摘要翻译： 公开了一种将氧化硅层选择性地沉积到不同导电类型的硅衬底上的工艺。 氧化硅层通过TEOS在相对较低的温度和较高的压力下的臭氧分解而形成。 还公开了该方法的使用以产生层，间隔物，存储单元和浇口，以及如此制造的结构。

公开(公告)号：US20050009291A1

公开(公告)日：2005-01-13

申请号：US10618220

申请日：2003-07-11

申请人： Jingyi Bai ,  Weimin Li ,  William Budge

发明人： Jingyi Bai ,  Weimin Li ,  William Budge

IPC分类号： H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/76229

摘要： Methods of filling high aspect ratio trenches in semiconductor layers are provided. The methods utilize HDP-CVD processes to fill trenches with trench filling material. In the methods, the gas flow and RF bias are selected to provide a high etch to deposition ratio, while the trenches are partially filled. The gas flow and RF bias are then selected to provide a low etch to deposition ratio while the trenches are completely filled. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that is will not be used to interpret or limit the scope or meaning of the claims.

摘要翻译： 提供了在半导体层中填充高纵横比沟槽的方法。 该方法利用HDP-CVD工艺用沟槽填充材料填充沟槽。 在这些方法中，气流和RF偏压被选择以提供对蚀刻比的高蚀刻，同时沟槽被部分填充。 然后选择气体流量和RF偏压，以在沟槽完全填充时提供低的沉积比。 要强调的是，该摘要被提供以符合要求摘要的规则，这将允许搜索者或其他读者快速确定技术公开的主题。 提交的理解是不会用于解释或限制权利要求的范围或含义。

公开(公告)号：US07501691B2

公开(公告)日：2009-03-10

申请号：US11846041

申请日：2007-08-28

申请人： John A. Smythe, III ,  William Budge

发明人： John A. Smythe, III ,  William Budge

IPC分类号： H01L23/58

CPC分类号： H01L21/76224

摘要： A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a liner layer preferably is deposited into the trench. An anisotropic plasma process is then performed on the trench. A silicon layer may be deposited on the base of the trench during the plasma process, or the plasma can treat the liner layer. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator, and oxidizing the silicon rich layer on the base of the trench. The resulting trench has a consistent etch rate from top to bottom of the trench.

摘要翻译： 提供了将电介质材料沉积到亚微米空间和结构中的方法。 在晶片的表面中蚀刻沟槽之后，衬垫层优选沉积到沟槽中。 然后在沟槽上进行各向异性等离子体处理。 在等离子体工艺期间，硅层可以沉积在沟槽的基底上，或等离子体可以处理衬层。 然后用旋涂前体填充沟槽。 然后施加致密化或反应过程以将旋涂材料转化成绝缘体，并且氧化沟槽底部的富硅层。 所得到的沟槽具有从沟槽的顶部到底部的一致的蚀刻速率。

公开(公告)号：US07078356B2

公开(公告)日：2006-07-18

申请号：US10102110

申请日：2002-03-19

申请人： Weimin Li ,  Zhiping Yin ,  William Budge

发明人： Weimin Li ,  Zhiping Yin ,  William Budge

IPC分类号： H01L21/31 ,  H01L21/469 ,  H05H1/24

CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

摘要： A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.

摘要翻译： 低k层间电介质层制造方法包括提供具有至少部分地形成在其上的集成电路的衬底。 在衬底上形成包含碳并具有不大于3.5的介电常数的层间电介质层的氧化物。 在形成包含电介质层的碳之后，将其暴露于包含氧的等离子体中，以有效地将介电常数降低到低于所述曝光之前的介电常数。 低k层间电介质层制造方法包括提供具有至少部分地形成在其上的集成电路的衬底。 在室中，包含碳并具有不大于3.5的介电常数的层间介电层是在低于大气压的压力下沉积在衬底上的等离子体增强化学气相。 在形成包含电介质层的碳之后，将其暴露于含有氧的等离子体，该等离子体压力有效地将介电常数降低至低于所述暴露之前的10％。 在沉积和暴露之间不会从衬底移除衬底而露出曝光，并且室内的压力保持在沉积和暴露之间的低于大气压。

公开(公告)号：US07056833B2

公开(公告)日：2006-06-06

申请号：US10669671

申请日：2003-09-23

申请人： Neal R. Rueger ,  William Budge ,  Weimin Li ,  Gurtej S. Sandhu

发明人： Neal R. Rueger ,  William Budge ,  Weimin Li ,  Gurtej S. Sandhu

IPC分类号： H01L21/31

CPC分类号： H01L21/02274 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76224 ,  H01L21/76837

摘要： The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

摘要翻译： 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层，使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙，使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2，HD，DT，T 2和TH组成的组中的至少一种气体存在下，材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的方差程度可以显着改善的表面上的变化程度。

公开(公告)号：US20060068584A1

公开(公告)日：2006-03-30

申请号：US11266914

申请日：2005-11-04

申请人： Weimin Li ,  Zhiping Yin ,  William Budge

发明人： Weimin Li ,  Zhiping Yin ,  William Budge

IPC分类号： H01L21/4763 ,  H01L21/31

CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

摘要： A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.

公开(公告)号：US20050196976A1

公开(公告)日：2005-09-08

申请号：US11115854

申请日：2005-04-25

申请人： Neal Rueger ,  William Budge ,  Weimin Li ,  Gurtej Sandhu

发明人： Neal Rueger ,  William Budge ,  Weimin Li ,  Gurtej Sandhu

IPC分类号： C23C16/04 ,  C23C16/40 ,  H01L21/316 ,  H01L21/762 ,  H01L21/768 ,  H01L21/76 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02274 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76224 ,  H01L21/76837

摘要： The invention includes a method of filling gaps in a semiconductor substrate. A substrate and a gas mixture containing at least one heavy-hydrogen compound are provided within a reaction chamber. The gas mixture is reacted to form a layer of material over the substrate by simultaneous deposition and etch of the layer. The layer of material fills the gap such that the material within the gap is essentially void-free. The invention includes a method of providing improved deposition rate uniformity. A material is deposited over a surface in the presence of at least one gas selected from the group consisting of D2, HD, DT, T2 and TH. The net deposition rate during the deposition has a degree of variance across the surface which is measurably improved relative to a corresponding degree of variance that occurs during deposition utilizing H2 under otherwise substantially identical conditions.

摘要翻译： 本发明包括填充半导体衬底中的间隙的方法。 在反应室内设置底物和含有至少一种重氢化合物的气体混合物。 通过同时沉积和蚀刻该层，使气体混合物反应以在衬底上形成一层材料。 材料层填充间隙，使得间隙内的材料基本上无空隙。 本发明包括提供改进的沉积速率均匀性的方法。 在选自由D 2，HD，DT，T 2和TH组成的组中的至少一种气体存在下，材料沉积在表面上。 沉积期间的净沉积速率在整个表面上具有相对于在其它实质上相同的条件下利用H 2 N沉积期间发生的相应的变化程度可以显着改善的表面上的变化程度。