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公开(公告)号:US20140063890A1
公开(公告)日:2014-03-06
申请号:US14018885
申请日:2013-09-05
申请人: Wookhyoung LEE , Jongsik CHUN , Sunil SHIM , Jaeyoung AHN , Juyul LEE , Kihyun HWANG , Hansoo KIM , Woonkyung LEE , Jaehoon JANG , Wonseok CHO
发明人: Wookhyoung LEE , Jongsik CHUN , Sunil SHIM , Jaeyoung AHN , Juyul LEE , Kihyun HWANG , Hansoo KIM , Woonkyung LEE , Jaehoon JANG , Wonseok CHO
CPC分类号: H01L27/11565 , G11C5/06 , G11C5/063 , G11C7/00 , G11C7/18 , H01L23/48 , H01L27/0207 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.
摘要翻译: 提供了一种半导体器件,其包括设置在基板上的栅极结构,插入在栅极结构之间的分离绝缘层以及通过每个栅极结构连接到基板的多个单元柱。 每个栅极结构可以包括垂直堆叠在基板上的水平电极,并且相邻的单元柱之间的间隔是不均匀的。
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公开(公告)号:US20160049419A1
公开(公告)日:2016-02-18
申请号:US14920223
申请日:2015-10-22
申请人: WOOKHYOUNG LEE , Jongsik CHUN , SUNIL SHIM , Jaeyoung AHN , JUYUL LEE , KIHYUN HWANG , HANSOO KIM , WOONKYUNG LEE , JAEHOON JANG , WONSEOK CHO
发明人: WOOKHYOUNG LEE , Jongsik CHUN , SUNIL SHIM , Jaeyoung AHN , JUYUL LEE , KIHYUN HWANG , HANSOO KIM , WOONKYUNG LEE , JAEHOON JANG , WONSEOK CHO
IPC分类号: H01L27/115
CPC分类号: H01L27/11565 , G11C5/06 , G11C5/063 , G11C7/00 , G11C7/18 , H01L23/48 , H01L27/0207 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.
摘要翻译: 提供了一种半导体器件,其包括设置在基板上的栅极结构,插入在栅极结构之间的分离绝缘层以及通过每个栅极结构连接到基板的多个单元柱。 每个栅极结构可以包括垂直堆叠在基板上的水平电极,并且相邻的单元柱之间的间隔是不均匀的。
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公开(公告)号:US09917094B2
公开(公告)日:2018-03-13
申请号:US14920223
申请日:2015-10-22
申请人: Wookhyoung Lee , Jongsik Chun , Sunil Shim , Jaeyoung Ahn , Juyul Lee , Kihyun Hwang , Hansoo Kim , Woonkyung Lee , Jaehoon Jang , Wonseok Cho
发明人: Wookhyoung Lee , Jongsik Chun , Sunil Shim , Jaeyoung Ahn , Juyul Lee , Kihyun Hwang , Hansoo Kim , Woonkyung Lee , Jaehoon Jang , Wonseok Cho
IPC分类号: G11C5/06 , H01L27/11565 , G11C7/00 , H01L23/48 , G11C7/18 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L27/02
CPC分类号: H01L27/11565 , G11C5/06 , G11C5/063 , G11C7/00 , G11C7/18 , H01L23/48 , H01L27/0207 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.
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公开(公告)号:US09177613B2
公开(公告)日:2015-11-03
申请号:US14018885
申请日:2013-09-05
申请人: Wookhyoung Lee , Jongsik Chun , Sunil Shim , Jaeyoung Ahn , Juyul Lee , Kihyun Hwang , Hansoo Kim , Woonkyung Lee , Jaehoon Jang , Wonseok Cho
发明人: Wookhyoung Lee , Jongsik Chun , Sunil Shim , Jaeyoung Ahn , Juyul Lee , Kihyun Hwang , Hansoo Kim , Woonkyung Lee , Jaehoon Jang , Wonseok Cho
CPC分类号: H01L27/11565 , G11C5/06 , G11C5/063 , G11C7/00 , G11C7/18 , H01L23/48 , H01L27/0207 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.
摘要翻译: 提供了一种半导体器件,其包括设置在基板上的栅极结构,插入在栅极结构之间的分离绝缘层以及通过每个栅极结构连接到基板的多个单元柱。 每个栅极结构可以包括垂直堆叠在基板上的水平电极,并且相邻的单元柱之间的间隔是不均匀的。
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