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    NONVOLATILE MEMORY DEVICE AND METHOD OF FORMING THE SAME
    1.
    发明申请
    NONVOLATILE MEMORY DEVICE AND METHOD OF FORMING THE SAME 审中-公开
    非易失性存储器件及其形成方法

    公开(公告)号：US20110049610A1

    公开(公告)日：2011-03-03

    申请号：US12845375

    申请日：2010-07-28

    申请人： Junkyu Yang ,  Jaeyoung Ahn ,  Young-Geun Park ,  Kihyun Hwang ,  Dongwoon Shin ,  Juyul Lee

    发明人： Junkyu Yang ,  Jaeyoung Ahn ,  Young-Geun Park ,  Kihyun Hwang ,  Dongwoon Shin ,  Juyul Lee

    IPC分类号： H01L29/792

    CPC分类号： H01L29/513 ,  G11C16/0466 ,  H01L27/11568 ,  H01L29/40117 ,  H01L29/66833 ,  H01L29/792

    摘要： Provided are a nonvolatile memory device and a method of forming the same. The nonvolatile memory device includes: a semiconductor substrate including a device isolation layer defining an active region; a tunnel insulating layer on the active region; a charge trapping layer on the tunnel insulating layer; a blocking insulating layer on the charge trapping layer and the device isolation layer; a gate electrode on the blocking insulating layer; and a barrier capping layer formed between the device isolation layer and the blocking insulating layer.

    摘要翻译： 提供一种非易失性存储器件及其形成方法。 非易失性存储器件包括：半导体衬底，其包括限定有源区的器件隔离层; 有源区上的隧道绝缘层; 隧道绝缘层上的电荷捕获层; 电荷俘获层和器件隔离层上的阻挡绝缘层; 阻挡绝缘层上的栅电极; 以及在器件隔离层和阻挡绝缘层之间形成的阻挡层覆盖层。

    NONVOLATILE MEMORY DEVICES INCLUDING MULTIPLE CHARGE TRAPPING LAYERS
    2.
    发明申请
    NONVOLATILE MEMORY DEVICES INCLUDING MULTIPLE CHARGE TRAPPING LAYERS 有权
    非易失性存储器件，包括多个电荷捕获层

    公开(公告)号：US20100123181A1

    公开(公告)日：2010-05-20

    申请号：US12612453

    申请日：2009-11-04

    申请人： Kwangmin Park ,  Juwan Lim ,  Seungjae Baik ,  Siyoung Choi ,  Kihyun Hwang ,  Juyul Lee

    发明人： Kwangmin Park ,  Juwan Lim ,  Seungjae Baik ,  Siyoung Choi ,  Kihyun Hwang ,  Juyul Lee

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L27/11568

    摘要： A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the substrate and the gate electrode; a charge tunneling layer between the charge trapping layer and the substrate; and a charge blocking layer between the gate electrode and the charge trapping layer. The charge trapping layer includes a first charge trapping layer having a first energy band gap and a second charge trapping layer having a second energy band gap that is different than the first energy band gap. The first and second charge trapping layers are repeatedly stacked and the first and second energy band gaps are smaller than energy band gaps of the charge tunneling layer and the charge blocking layer.

    摘要翻译： 电荷阱非易失性存储器件包括在衬底上的栅电极; 在基板和栅电极之间的电荷捕获层; 在电荷捕获层和衬底之间的电荷隧道层; 以及栅电极和电荷捕获层之间的电荷阻挡层。 电荷捕获层包括具有第一能带隙的第一电荷俘获层和具有不同于第一能带隙的第二能带隙的第二电荷俘获层。 第一和第二电荷捕获层被重复堆叠，并且第一和第二能带间隙小于电荷隧穿层和电荷阻挡层的能带隙。

    Nonvolatile memory devices including deep and high density trapping layers
    4.
    发明授权
    Nonvolatile memory devices including deep and high density trapping layers 有权
    非易失性存储器件包括深层和高密度捕获层

    公开(公告)号：US08431984B2

    公开(公告)日：2013-04-30

    申请号：US13035477

    申请日：2011-02-25

    申请人： Kwangmin Park ,  Juwan Lim ,  Seungjae Baik ,  Siyoung Choi ,  Kihyun Hwang ,  Juyul Lee

    发明人： Kwangmin Park ,  Juwan Lim ,  Seungjae Baik ,  Siyoung Choi ,  Kihyun Hwang ,  Juyul Lee

    IPC分类号： H01L29/792

    CPC分类号： H01L21/28282 ,  G11C16/0466 ,  H01L27/11568 ,  H01L29/792

    摘要： A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the gate electrode and the substrate, the charge trapping layer having trap sites configured to trap charges; a charge tunneling layer between the trapping layer and the semiconductor substrate; and a charge blocking layer between the gate electrode and the trapping layer. The charge trapping layer comprises a deep trapping layer having a plurality of energy barriers and a high density trapping layer having a trap site density higher than a trap site density of the deep trapping layer.

    摘要翻译： 电荷阱非易失性存储器件包括在衬底上的栅电极; 位于栅电极和衬底之间的电荷捕获层，电荷俘获层具有陷阱位置，用于捕获电荷; 捕获层和半导体衬底之间的电荷隧道层; 以及栅电极和俘获层之间的电荷阻挡层。 电荷捕获层包括具有多个能量势垒的深陷阱层和具有高于深捕获层的捕获位点密度的捕获位点密度的高密度俘获层。

    Method for fabricating nonvolatile memory device
    9.
    发明申请
    Method for fabricating nonvolatile memory device 失效
    非易失性存储器件的制造方法

    公开(公告)号：US20100048012A1

    公开(公告)日：2010-02-25

    申请号：US12461188

    申请日：2009-08-04

    申请人： Juyul Lee ,  Seungjae Baik ,  Kihyun Hwang ,  Siyoung Choi

    发明人： Juyul Lee ,  Seungjae Baik ,  Kihyun Hwang ,  Siyoung Choi

    IPC分类号： H01L21/8246 ,  H01L21/336

    CPC分类号： H01L27/11568 ,  H01L27/11565 ,  H01L27/11573

    摘要： Provided is a method for fabricating a nonvolatile memory device capable of improving charge retention characteristics. The method for fabricating a nonvolatile memory device includes forming a charge trapping layer with a memory region and a charge blocking region on a semiconductor substrate, and trapping charges in the charge blocking region of the charge trapping layer.

    摘要翻译： 提供一种制造能够改善电荷保持特性的非易失性存储器件的方法。 非易失性存储器件的制造方法包括在半导体衬底上形成具有存储区域和电荷阻挡区域的电荷俘获层，并且在电荷俘获层的电荷阻挡区域中俘获电荷。