公开(公告)号：US5751027A

公开(公告)日：1998-05-12

申请号：US555846

申请日：1995-11-10

申请人： Minoru Sawada ,  Yasoo Harada

发明人： Minoru Sawada ,  Yasoo Harada

IPC分类号： H01L29/812 ,  H01L21/285 ,  H01L21/335 ,  H01L21/338 ,  H01L29/10 ,  H01L29/778 ,  H01L29/80 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： H01L29/66462 ,  H01L21/28587 ,  H01L29/1029 ,  H01L29/802

摘要： A field effect semiconductor device includes an undoped In.sub.0.2 Ga.sub.0.8 As first low-noise drift layer, an undoped In.sub.x Ga.sub.1-x As (x=0.2-0) second low-noise drift layer and an n-type GaAs high-power drift layer in this order. The high-power drift layer includes a first high-power drift layer doped with n-type carrier at high concentration and a second high-power drift layer doped with n-type carrier at low concentration.

摘要翻译： 场效应半导体器件包括未掺杂的In0.2Ga0.8As第一低噪声漂移层，未掺杂的In x Ga 1-x As（x = 0.2-0）第二低噪声漂移层和n型GaAs高功率漂移层， 这个命令。 高功率漂移层包括掺杂有高浓度的n型载流子的第一高功率漂移层和以低浓度掺杂n型载流子的第二高功率漂移层。

公开(公告)号：US5585676A

公开(公告)日：1996-12-17

申请号：US228654

申请日：1994-04-18

申请人： Hisanori Uda ,  Tetsuro Sawai ,  Toshikazu Imaoka ,  Toshikazu Hirai ,  Yasoo Harada

发明人： Hisanori Uda ,  Tetsuro Sawai ,  Toshikazu Imaoka ,  Toshikazu Hirai ,  Yasoo Harada

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/50 ,  H01L27/02 ,  H01L27/06 ,  H01L23/48

CPC分类号： H01L24/06 ,  H01L23/50 ,  H01L24/49 ,  H01L27/0207 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L24/48 ,  H01L27/0605 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/1306 ,  H01L2924/13063 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19107

摘要： An IC chip characterized in that at least two input pads and at least two output pads are respectively disposed symmetrical to each other about the center of the IC chip, at least two input/output pads are disposed symmetrical to each other about the center, at least one supply voltage pad is disposed in each of four equal sections formed by longitudinally and laterally dividing the IC chip, and at least one control voltage pad is disposed in each of these four sections. The IC chip can be connected by bonding to various types of IC packages having different configurations of the pins only by mounting in a proper direction without causing the bonding wires to bridge over the other constituent elements or to cross each other.

摘要翻译： 一种IC芯片，其特征在于，至少两个输入焊盘和至少两个输出焊盘分别围绕IC芯片的中心彼此对称地布置，至少两个输入/输出焊盘相对于中心彼此对称地设置， 在通过纵向和横向分割IC芯片形成的四个相等部分中的每一个中设置至少一个电源电压焊盘，并且在这四个部分中的每一个中设置至少一个控制电压焊盘。 IC芯片可以通过仅通过以适当的方向安装而不会使接合线桥接在其他构成元件上或彼此交叉的方式通过结合到具有不同构造的引脚的各种类型的IC封装来连接。

公开(公告)号：US5477184A

公开(公告)日：1995-12-19

申请号：US47786

申请日：1993-04-15

申请人： Hisanori Uda ,  Yasoo Harada

发明人： Hisanori Uda ,  Yasoo Harada

IPC分类号： H03K17/687 ,  H03K17/693

CPC分类号： H03K17/6871 ,  H03K17/6874 ,  H03K17/693

摘要： An FET switch used for switching between a first transmission path includes a plurality of FETs for the transmission of a low power signal received at an antenna and a second transmission path including a plurality of FETs for the transmission of a higher power signal to the antenna, wherein the first transmission path and the second transmission path have FET circuits of configurations different from each other and/or employ FETs of different characteristics.

摘要翻译： 用于在第一传输路径之间切换的FET开关包括用于传输在天线处接收的低功率信号的多个FET和包括用于向天线传输更高功率信号的多个FET的第二传输路径， 其中第一传输路径和第二传输路径具有彼此不同的配置的FET电路和/或采用不同特性的FET。

公开(公告)号：US5724459A

公开(公告)日：1998-03-03

申请号：US675158

申请日：1996-07-03

申请人： Seiichi Banba ,  Minoru Sawada ,  Yasoo Harada

发明人： Seiichi Banba ,  Minoru Sawada ,  Yasoo Harada

IPC分类号： H04B10/516 ,  G02F1/03 ,  H04B10/2507 ,  H04B10/2575 ,  H04B10/54 ,  H04B10/61 ,  G02B6/10

CPC分类号： H04B10/2507 ,  G02F1/0327

摘要： A optical divider equally divides a optical carrier into first and second optical carriers. A 180.degree. divider divides an RF sub-carrier signal into first and second RF sub-carrier signals whose phases are 180.degree. inverted from each other. An electro-optic modulator modulates the first optical carrier with the first RF sub-carrier signal and outputs a first optical signal. An electro-optic modulator modulates the second optical signal with the second RF sub-carrier signal and outputs a second optical signal. Photodiodes convert the first and second optical signals transmitted by the optical fibers into first and second electric signals, respectively. A 180.degree. combiner inverts by 180.degree. the phase of the first electric signal and combines it with the second electric signal.

摘要翻译： 光分路器将光载波等分成第一和第二光载波。 180°分频器将RF子载波信号分成相位彼此相反180°的第一和第二RF子载波信号。 电光调制器用第一RF子载波信号调制第一光载波并输出第一光信号。 电光调制器用第二RF子载波信号调制第二光信号并输出​​第二光信号。 光电二极管将由光纤传输的第一和第二光信号分别转换成第一和第二电信号。 180°组合器将第一个电信号的相位反相180°，并将其与第二个电信号组合。

公开(公告)号：US5650642A

公开(公告)日：1997-07-22

申请号：US400651

申请日：1995-03-08

申请人： Minoru Sawada ,  Shigeharu Matsushita ,  Satoshi Terada ,  Emi Fujii ,  Yasoo Harada

发明人： Minoru Sawada ,  Shigeharu Matsushita ,  Satoshi Terada ,  Emi Fujii ,  Yasoo Harada

IPC分类号： H01L29/80 ,  H01L21/338 ,  H01L29/10 ,  H01L29/778 ,  H01L29/812 ,  H01L29/161

CPC分类号： H01L29/1029 ,  H01L29/7783

摘要： A field effect semiconductor device comprises a first channel layer composed of an undoped semiconductor in which electrons mainly drift in low-noise operation and a second channel layer composed of a semiconductor of one conductivity type in which electrons mainly drift in high-power operation, a third channel layer being provided in the second channel layer or on the second channel layer on the opposite side of the first channel layer. The third channel layer is constituted by at least one semiconductor layer of the one conductivity type or undoped having a greater electron affinity than that of the second channel layer and having a smaller forbidden bandgap than that of the second channel layer. In another field effect semiconductor device, an undoped impurity diffusion preventing layer having an electron affinity approximately equal to that of the second channel layer is provided between the first channel layer and the second channel layer.

摘要翻译： 场效应半导体器件包括由电子主要在低噪声运行中漂移的未掺杂半导体构成的第一沟道层和由高功率运行中电子主要漂移的一种导电类型的半导体构成的第二沟道层， 第三沟道层设置在第二沟道层中或在第二沟道层上与第一沟道层相对的一侧。 第三沟道层由至少一个导电类型的半导体层或不掺杂的具有比第二沟道层的电子亲和力更大的电子亲和力并且具有比第二沟道层的更小的禁止带隙构成。 在另一种场效应半导体器件中，在第一沟道层和第二沟道层之间设置具有大致等于第二沟道层的电子亲和力的未掺杂的杂质扩散防止层。

公开(公告)号：US5614814A

公开(公告)日：1997-03-25

申请号：US365462

申请日：1994-12-28

申请人： Masao Nishida ,  Takayoshi Higashino ,  Yasoo Harada

发明人： Masao Nishida ,  Takayoshi Higashino ,  Yasoo Harada

IPC分类号： H02M3/07 ,  H02M3/18

CPC分类号： H02M3/07

摘要： A negative voltage generating circuit includes an oscillating unit constructed of a ring oscillator for outputting a pulse signal with a high frequency and a polarity inverting unit in which the pulse signal is inputted to charge negative voltage. This negative voltage generating circuit is miniaturized and outputs a stable negative voltage. Further, the negative voltage to be outputted can be controlled by varying a resistance value through a control of an FET in a voltage controlling unit.

摘要翻译： 负电压产生电路包括由环形振荡器构成的振荡单元，用于输出高频脉冲信号和极性反转单元，其中输入脉冲信号以对负电压进行充电。 该负电压发生电路小型化并输出稳定的负电压。 此外，可以通过电压控制单元中的FET的控制来改变电阻值来控制要输出的负电压。

公开(公告)号：US5932889A

公开(公告)日：1999-08-03

申请号：US561124

申请日：1995-11-20

申请人： Kohji Matsumura ,  Yasoo Harada

发明人： Kohji Matsumura ,  Yasoo Harada

IPC分类号： H01L29/06 ,  H01L29/12 ,  H01L29/76 ,  H01L29/778 ,  H01L29/788 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： B82Y10/00 ,  H01L29/127 ,  H01L29/7613 ,  H01L29/7781 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/7888

摘要： An undoped Al.sub.0.22 Ga.sub.0.78 As spacer layer having a large forbidden bandgap and an N-Al.sub.0.22 Ga.sub.0.78 As electron-supplying layer having a large forbidden bandgap are formed in order on an undoped GaAs buffer layer having a small forbidden bandgap, and InAs quantum boxes are provided in the Al.sub.0.22 Ga.sub.0.78 As spacer layer. The size of the InAs quantum box is about 150 .ANG. and the height is about 40 .ANG.. When a predetermined drain voltage is applied, electrons are accumulated in the InAs quantum boxes from a channel formed in the vicinity of the interface with the Al.sub.0.22 Ga.sub.0.78 As spacer layer in the GaAs buffer layer. Accordingly, a drain current will not flow almost at all even if a drain voltage is applied.

摘要翻译： 在具有较小禁带隙的未掺杂的GaAs缓冲层上依次形成具有较大禁止带隙的未掺杂的Al0.22Ga0.78As间隔层和具有较大禁止带隙的N-Al0.22Ga0.78As电子供应层，InAs 量子盒设置在Al0.22Ga0.78As间隔层中。 InAs量子箱的大小约为150安培，高度约为40安培。 当施加预定的漏极电压时，电子从在GaAs缓冲层中与Al0.22Ga0.78As间隔层的界面附近形成的沟道中积累在InAs量子箱中。 因此，即使施加漏极电压，漏极电流几乎不会流出。

公开(公告)号：US5559457A

公开(公告)日：1996-09-24

申请号：US215193

申请日：1994-03-21

申请人： Hisanori Uda ,  Tetsuro Sawai ,  Toshikazu Imaoka ,  Toshikazu Hirai ,  Yasoo Harada

发明人： Hisanori Uda ,  Tetsuro Sawai ,  Toshikazu Imaoka ,  Toshikazu Hirai ,  Yasoo Harada

IPC分类号： H03D7/00 ,  H03D7/12 ,  H03D7/14 ,  H03D9/06 ,  H04B1/28 ,  H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D2200/0007 ,  H03D2200/0084 ,  H03D2200/0088 ,  H03D7/125 ,  H03D9/0658

摘要： A double-balanced mixer circuit which consumes less power, and is capable of operating on a low voltage power source, because an output of a first signal having a phase lag of 90.degree. from a first frequency signal and an output of a second signal having a phase lead of 90.degree. over the first frequency signal are provided by means of a first phase shifter, an output of a third signal having a phase lag of 90.degree. from a second frequency signal and an output of fourth signal having a phase lead of 90.degree. over the second frequency signal are provided by means of a second phase shifter, thereby generating a radio frequency signal by mixing the first signal and the third signal in a first dual gate circuit, and generating a radio frequency signal by mixing the second signal and the fourth signal in a second dual gate circuit.

摘要翻译： 一种双平衡混频器电路，其消耗较少的功率，并且能够在低电压电源上工作，因为与第一频率信号相差90度的第一信号的输出和具有第一信号的第二信号的输出， 通过第一移相器提供90°以上的第一频率信号的相位引导，从第二频率信号输出具有90°的相位滞后的第三信号和具有相位引导的第四信号的输出 通过第二移相器提供第二频率信号的90°，从而通过在第一双门电路中混合第一信号和第三信号来产生射频信号，并且通过混合第二信号来产生射频信号 以及第二双门电路中的第四信号。

公开(公告)号：US5528509A

公开(公告)日：1996-06-18

申请号：US214821

申请日：1994-03-17

申请人： Tetsuro Sawai ,  Shigeyuki Murai ,  Tsutomu Yamaguchi ,  Yasoo Harada

发明人： Tetsuro Sawai ,  Shigeyuki Murai ,  Tsutomu Yamaguchi ,  Yasoo Harada

IPC分类号： H03F1/02 ,  G06F17/50 ,  H03G3/00 ,  H03F3/16

CPC分类号： G06F17/5063

摘要： The S-parameters of a transistor are measured at a plurality of bias points, and using a tentatively decided load resistance value, the S-parameters on the load curve are examined, based on which the power gain and input/output power characteristics are obtained to determine the optimum load. Then, by using a linear simulator, input and output circuits are designed so that the optimum load can be realized.

摘要翻译： 在多个偏置点测量晶体管的S参数，并且使用暂时确定的负载电阻值，检查负载曲线上的S参数，基于该参数获得功率增益和输入/输出功率特性 以确定最佳负载。 然后，通过使用线性模拟器，设计输入和输出电路，以便实现最佳负载。

公开(公告)号：US5751029A

公开(公告)日：1998-05-12

申请号：US651340

申请日：1996-05-17

申请人： Shigeharu Matsushita ,  Daijirou Inoue ,  Kohji Matsumura ,  Minoru Sawada ,  Yasoo Harada

发明人： Shigeharu Matsushita ,  Daijirou Inoue ,  Kohji Matsumura ,  Minoru Sawada ,  Yasoo Harada

IPC分类号： H01L29/812 ,  H01L21/338 ,  H01L29/778 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/7784

摘要： An undoped Al.sub.0.22 Ga.sub.0.78 As layer, an undoped In.sub.0.2 Ga.sub.0.8 As electron-drifting layer, and an undoped GaAs electron-supplying layer are formed in order on a GaAs substrate. An impurity-doped layer .delta.-doped with Si donor is formed in the GaAs electron-supplying layer. An n-Al.sub.0.22 Ga.sub.0.78 As layer and n.sup.+ -GaAs cap layers are formed in order on the GaAs electron-supplying layer. A source electrode and a drain electrode are formed on the n.sup.+ -GaAs cap layers and a gate electrode is formed on the n-Al.sub.0.22 Ga.sub.0.78 As layer.

摘要翻译： 在GaAs衬底上依次形成未掺杂的Al0.22Ga0.78As层，未掺杂的In0.2Ga0.8As电子漂移层和未掺杂的GaAs电子供体层。 在GaAs电子供给层中形成掺杂有Si供体的杂质掺杂层δ。 在GaAs电子供给层上依次形成n-Al0.22Ga0.78As层和n + -GaAs覆盖层。 在n + -GaAs覆盖层上形成源电极和漏电极，在n-Al0.22Ga0.78As层上形成栅电极。