公开(公告)号：US5064706A

公开(公告)日：1991-11-12

申请号：US281401

申请日：1988-12-08

申请人： Tetsuya Ueda ,  Haruo Shimamoto ,  Hideya Yagoura ,  Hiroshi Seki ,  Yasuhiro Teraoka

发明人： Tetsuya Ueda ,  Haruo Shimamoto ,  Hideya Yagoura ,  Hiroshi Seki ,  Yasuhiro Teraoka

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/49524 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  Y10S428/901 ,  Y10S428/906 ,  Y10T29/49121 ,  Y10T428/24273 ,  Y10T428/24298 ,  Y10T428/24322

摘要： A carrier tape includes a film having an opening for receiving a semiconductor chip to be resin-molded by a pair of mold halves and outer lead holes formed around the periphery of the opening, a plurality of leads for mounting the semiconductor chip on the film, and a resin running portion cooperating, when the mold halves are closed with the film held between the mold halves, with a gate formed on a parting surface of one of the mold halves to define a resin running path which extends from a portion of the film outside the outer lead holes to the opening for guiding a molten resin into the mold halves while preventing the resin from entering the outer lead holes.

摘要翻译： 载带包括具有用于接收半导体芯片的开口的膜，该半导体芯片由一对半模形成，并且形成在开口周围的外部引线孔;多个用于将半导体芯片安装在膜上的引线， 以及当所述半模被所述半模保持在所述半模之间的所述半模封闭时，与所述半模中的一个的分离面上形成的门形成一个树脂运行路径，从而形成从所述膜的一部分延伸的树脂行进路径， 在外部引线孔外面到开口，用于将熔融树脂引导到半模中，同时防止树脂进入外部引线孔。

公开(公告)号：US4839713A

公开(公告)日：1989-06-13

申请号：US156571

申请日：1988-02-17

申请人： Yasuhiro Teraoka ,  Tetsuya Ueda ,  Hideya Yagoura ,  Haruo Shimamoto ,  Shigeyuki Nango ,  Toshinobu Banjo ,  Hiroshi Seki

发明人： Yasuhiro Teraoka ,  Tetsuya Ueda ,  Hideya Yagoura ,  Haruo Shimamoto ,  Shigeyuki Nango ,  Toshinobu Banjo ,  Hiroshi Seki

IPC分类号： H01L23/057 ,  H01L23/24 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L23/057 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082

摘要： A package structure comprising a metallic cap having a bottom wall to which the bottom surface of the semiconductor chip is electrically and mechanically connected, a side wall extending from said bottom wall and surrounding the semiconductor chip, and a flange extending outwardly from said side wall substantially parallel to said bottom wall, said flange supporting the lead conductors thereon through an electrically insulating material. The electrical connection means is disposed between the metallic cap flange and the lead conductor for establishing an electrical connection therebetween. The electrical connection means may comprise an electrically conductive projection formed on the flange of the metal cap, extending through a notch in the insulating material and electrically connected to the lead conductor. The electrical connection means may be an electrically conductive bonding material filled within a cavity defined by an opening in the flange of the metal cap, a through hole in the insulating material and a connecting pad of the lead conductor.

摘要翻译： 一种包装结构，包括具有底壁的金属盖，半导体芯片的底表面电气和机械连接到该底壁，从所述底壁延伸并围绕半导体芯片的侧壁，以及从所述侧壁向外延伸的凸缘， 平行于所述底壁，所述凸缘通过电绝缘材料在其上支撑引线导体。 电连接装置设置在金属帽凸缘和引线导体之间，用于在它们之间建立电连接。 电连接装置可以包括形成在金属帽的凸缘上的导电突起，延伸穿过绝缘材料中的凹口并电连接到引线导体。 电连接装置可以是填充在由金属盖的凸缘中的开口，绝缘材料中的通孔和引线导体的连接焊盘限定的空腔内的导电接合材料。

公开(公告)号：US5157478A

公开(公告)日：1992-10-20

申请号：US810354

申请日：1991-12-18

申请人： Tetsuya Ueda ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Hideya Yagoura ,  Hiroshi Seki

发明人： Tetsuya Ueda ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Hideya Yagoura ,  Hiroshi Seki

IPC分类号： H01L21/56 ,  H01L23/16 ,  H01L23/433 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/16 ,  H01L23/4334 ,  H01L23/49572 ,  H01L2224/50 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/16152 ,  H01L2924/3511

摘要： A packaged semiconductor device includes an insulating film having an opening, a semiconductor chip disposed in the opening of the insulating film and having a plurality of electrodes, a plurality of leads, each having one end connected to a corresponding electrode, the plurality of leads being supported on the insulating film, a heat radiator disposed opposite and spaced from the semiconductor chip, and a resin package body encapsulating the semiconductor chip and part of the heat radiator, leaving a surface of the heat radiator externally exposed and the second ends of the plurality of leads extending outwardly from the package.

摘要翻译： 封装半导体器件包括具有开口的绝缘膜，设置在绝缘膜的开口中并具有多个电极的半导体芯片，多个引线，每个引线的一端连接到相应的电极，多个引线为 支撑在绝缘膜上，与半导体芯片相对且间隔开的散热器，以及封装半导体芯片和散热器的一部分的树脂封装体，使散热器的外表面露出，并且多个第二端 的引线从封装向外延伸。

公开(公告)号：US5166099A

公开(公告)日：1992-11-24

申请号：US759912

申请日：1991-09-13

申请人： Tetsuya Ueda ,  Osami Nakagawa ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Seiji Takemura

发明人： Tetsuya Ueda ,  Osami Nakagawa ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Seiji Takemura

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/495

CPC分类号： H01L24/86 ,  H01L21/56 ,  H01L21/565 ,  H01L23/49572 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/7965 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49121

摘要： A manufacturing method for a semiconductor device in which an electrode of a semiconductor chip is electrically connected to an inner lead of a carrier tape. The electrodes of the semiconductor chip are brought into contact with the inner lead of the carrier tape. Bonding is performed with inner lead droop controlled to no more than 80 .mu.m.

摘要翻译： 一种半导体器件的制造方法，其中半导体芯片的电极电连接到载带的内引线。 使半导体芯片的电极与载带的内引线接触。 内部引线下垂控制在不超过80m的情况下进行接合。