公开(公告)号：US5157478A

公开(公告)日：1992-10-20

申请号：US810354

申请日：1991-12-18

申请人： Tetsuya Ueda ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Hideya Yagoura ,  Hiroshi Seki

发明人： Tetsuya Ueda ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Hideya Yagoura ,  Hiroshi Seki

IPC分类号： H01L21/56 ,  H01L23/16 ,  H01L23/433 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/16 ,  H01L23/4334 ,  H01L23/49572 ,  H01L2224/50 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/16152 ,  H01L2924/3511

摘要： A packaged semiconductor device includes an insulating film having an opening, a semiconductor chip disposed in the opening of the insulating film and having a plurality of electrodes, a plurality of leads, each having one end connected to a corresponding electrode, the plurality of leads being supported on the insulating film, a heat radiator disposed opposite and spaced from the semiconductor chip, and a resin package body encapsulating the semiconductor chip and part of the heat radiator, leaving a surface of the heat radiator externally exposed and the second ends of the plurality of leads extending outwardly from the package.

摘要翻译： 封装半导体器件包括具有开口的绝缘膜，设置在绝缘膜的开口中并具有多个电极的半导体芯片，多个引线，每个引线的一端连接到相应的电极，多个引线为 支撑在绝缘膜上，与半导体芯片相对且间隔开的散热器，以及封装半导体芯片和散热器的一部分的树脂封装体，使散热器的外表面露出，并且多个第二端 的引线从封装向外延伸。

公开(公告)号：US5064706A

公开(公告)日：1991-11-12

申请号：US281401

申请日：1988-12-08

申请人： Tetsuya Ueda ,  Haruo Shimamoto ,  Hideya Yagoura ,  Hiroshi Seki ,  Yasuhiro Teraoka

发明人： Tetsuya Ueda ,  Haruo Shimamoto ,  Hideya Yagoura ,  Hiroshi Seki ,  Yasuhiro Teraoka

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/49524 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  Y10S428/901 ,  Y10S428/906 ,  Y10T29/49121 ,  Y10T428/24273 ,  Y10T428/24298 ,  Y10T428/24322

摘要： A carrier tape includes a film having an opening for receiving a semiconductor chip to be resin-molded by a pair of mold halves and outer lead holes formed around the periphery of the opening, a plurality of leads for mounting the semiconductor chip on the film, and a resin running portion cooperating, when the mold halves are closed with the film held between the mold halves, with a gate formed on a parting surface of one of the mold halves to define a resin running path which extends from a portion of the film outside the outer lead holes to the opening for guiding a molten resin into the mold halves while preventing the resin from entering the outer lead holes.

摘要翻译： 载带包括具有用于接收半导体芯片的开口的膜，该半导体芯片由一对半模形成，并且形成在开口周围的外部引线孔;多个用于将半导体芯片安装在膜上的引线， 以及当所述半模被所述半模保持在所述半模之间的所述半模封闭时，与所述半模中的一个的分离面上形成的门形成一个树脂运行路径，从而形成从所述膜的一部分延伸的树脂行进路径， 在外部引线孔外面到开口，用于将熔融树脂引导到半模中，同时防止树脂进入外部引线孔。

公开(公告)号：US4839713A

公开(公告)日：1989-06-13

申请号：US156571

申请日：1988-02-17

申请人： Yasuhiro Teraoka ,  Tetsuya Ueda ,  Hideya Yagoura ,  Haruo Shimamoto ,  Shigeyuki Nango ,  Toshinobu Banjo ,  Hiroshi Seki

发明人： Yasuhiro Teraoka ,  Tetsuya Ueda ,  Hideya Yagoura ,  Haruo Shimamoto ,  Shigeyuki Nango ,  Toshinobu Banjo ,  Hiroshi Seki

IPC分类号： H01L23/057 ,  H01L23/24 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L23/057 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082

摘要： A package structure comprising a metallic cap having a bottom wall to which the bottom surface of the semiconductor chip is electrically and mechanically connected, a side wall extending from said bottom wall and surrounding the semiconductor chip, and a flange extending outwardly from said side wall substantially parallel to said bottom wall, said flange supporting the lead conductors thereon through an electrically insulating material. The electrical connection means is disposed between the metallic cap flange and the lead conductor for establishing an electrical connection therebetween. The electrical connection means may comprise an electrically conductive projection formed on the flange of the metal cap, extending through a notch in the insulating material and electrically connected to the lead conductor. The electrical connection means may be an electrically conductive bonding material filled within a cavity defined by an opening in the flange of the metal cap, a through hole in the insulating material and a connecting pad of the lead conductor.

摘要翻译： 一种包装结构，包括具有底壁的金属盖，半导体芯片的底表面电气和机械连接到该底壁，从所述底壁延伸并围绕半导体芯片的侧壁，以及从所述侧壁向外延伸的凸缘， 平行于所述底壁，所述凸缘通过电绝缘材料在其上支撑引线导体。 电连接装置设置在金属帽凸缘和引线导体之间，用于在它们之间建立电连接。 电连接装置可以包括形成在金属帽的凸缘上的导电突起，延伸穿过绝缘材料中的凹口并电连接到引线导体。 电连接装置可以是填充在由金属盖的凸缘中的开口，绝缘材料中的通孔和引线导体的连接焊盘限定的空腔内的导电接合材料。

公开(公告)号：US5166099A

公开(公告)日：1992-11-24

申请号：US759912

申请日：1991-09-13

申请人： Tetsuya Ueda ,  Osami Nakagawa ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Seiji Takemura

发明人： Tetsuya Ueda ,  Osami Nakagawa ,  Haruo Shimamoto ,  Yasuhiro Teraoka ,  Seiji Takemura

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/495

CPC分类号： H01L24/86 ,  H01L21/56 ,  H01L21/565 ,  H01L23/49572 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/7965 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49121

摘要： A manufacturing method for a semiconductor device in which an electrode of a semiconductor chip is electrically connected to an inner lead of a carrier tape. The electrodes of the semiconductor chip are brought into contact with the inner lead of the carrier tape. Bonding is performed with inner lead droop controlled to no more than 80 .mu.m.

摘要翻译： 一种半导体器件的制造方法，其中半导体芯片的电极电连接到载带的内引线。 使半导体芯片的电极与载带的内引线接触。 内部引线下垂控制在不超过80m的情况下进行接合。

公开(公告)号：US5309021A

公开(公告)日：1994-05-03

申请号：US961352

申请日：1992-10-15

申请人： Haruo Shimamoto ,  Jun Shibata ,  Toru Tachikawa ,  Tetsuya Ueda ,  Hiroshi Seki

发明人： Haruo Shimamoto ,  Jun Shibata ,  Toru Tachikawa ,  Tetsuya Ueda ,  Hiroshi Seki

IPC分类号： H01L21/60 ,  H01L23/28 ,  H01L23/495 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H01L39/02 ,  H01L23/58 ,  H01L23/12 ,  H01L23/48

CPC分类号： H01L23/49527 ,  H01L23/49517 ,  H05K3/341 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/0263 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K3/3426 ,  Y02P70/613

摘要： A semiconductor device according to the present invention has reduced inductance on a power supply line, a grounding line, and signal lines. In this invention, to reduce the length of the power supply connection and that of the grounding connection, a power supply metal post and a grounding metal post are respectively provided on a power supply lead of a semiconductor chip and grounding lead of the semiconductor chip perpendicular to the leads. The metal posts protrude from the resin encapsulating the chip and are connected to lands or a conductive circuit pattern on a printed circuit board. Furthermore, a planar conductor commonly connecting the power supply or grounding potentials is provided.

摘要翻译： 根据本发明的半导体器件具有减小电源线，接地线和信号线上的电感。 在本发明中，为了减小电源连接的长度和接地连接的长度，分别在半导体芯片的电源引线和半导体芯片的接地引线垂直地设置电源金属柱和接地金属柱 到线索 金属柱从封装芯片的树脂突出，并连接到印刷电路板上的焊盘或导电电路图案。 此外，提供通常连接电源或接地电位的平面导体。

公开(公告)号：US4865193A

公开(公告)日：1989-09-12

申请号：US210086

申请日：1988-06-22

申请人： Haruo Shimamoto ,  Tetsuya Ueda

发明人： Haruo Shimamoto ,  Tetsuya Ueda

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/495

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181

摘要： A tape carrier utilized in the tape automated bonding of semiconductor chips is disclosed which comprises a polyimide tape-shaped film having apertures therein, and patterns of leads and reinforcing members formed on a surface of the film. The reinforcing members may be made of the same material as the leads, such as copper, and formed by a single photoetching process on the film. The reinforcing members are disposed on those areas of the film which lie outside of the leads and which are subjected to stress during the sealing of the semiconductor chips into a resinous mold subsequent to the inner lead bonding thereof. For example, the reinforcing members may be disposed in the lead supporting zones of the film, or around the corners of the outer-lead apertures. The reinforcing members reduces the stresses exerted on the leads during the molding of the chips, so that the deformations thereof during the same process are minimized.

摘要翻译： 公开了一种用于半导体芯片的带自动接合的带载体，其包括其中具有孔的聚酰亚胺带状膜，以及形成在膜的表面上的引线和加强件的图案。 加强构件可以由诸如铜的引线相同的材料制成，并且通过在膜上的单次光刻工艺形成。 加强构件设置在位于引线外部的膜的那些区域上，并且在将半导体芯片密封到其内部引线接合之后的树脂模具中时受到应力。 例如，加强构件可以设置在膜的引线支撑区域中或者围绕外引线孔的角部。 加强构件减小了在芯片成型期间施加在引线上的应力，使得在相同工艺期间其变形最小化。

公开(公告)号：US08669833B2

公开(公告)日：2014-03-11

申请号：US13375945

申请日：2010-06-03

申请人： Tetsuya Ueda

发明人： Tetsuya Ueda

IPC分类号： H01P1/205 ,  H01P7/10

CPC分类号： H01P7/10 ,  G02B1/002 ,  G02B5/3058 ,  H01P1/20 ,  H01P1/2084

摘要： In a metamaterial, a dielectric layer includes a host medium and dielectric bodies disposed in rows with predetermined intervals therebetween is sandwiched between a pair of conductive mesh plates each having holes, thereby forming a functional layer including dielectric resonators corresponding to the dielectric bodies. The metamaterial is configured by laminating the functional layers. The holes and the dielectric resonators are positioned coaxially and an electromagnetic wave is propagated in each of the functional layers in a propagation direction perpendicular to a multi-layered laminate surface such that the metamaterial function as a left-handed metamaterial in relation to the propagation direction perpendicular to the multi-layered surface.

摘要翻译： 在超材料中，电介质层包括主介体，并且以一定间隔设置成行的电介质体夹在一对具有孔的导电网板之间，从而形成包括对应于介电体的介电谐振器的功能层。 超材料通过层压功能层而构成。 孔和介质谐振器同轴地定位，并且电磁波在垂直于多层叠层表面的传播方向上在每个功能层中传播，使得超材料相对于传播方向作为左旋超材料 垂直于多层表面。

公开(公告)号：US08294538B2

公开(公告)日：2012-10-23

申请号：US12530102

申请日：2008-03-05

申请人： Tetsuya Ueda

发明人： Tetsuya Ueda

IPC分类号： H01P3/08

CPC分类号： H01Q1/38 ,  H01P1/203 ,  H01P1/207 ,  H01P1/32 ,  H01Q13/206

摘要： A transmission line microwave apparatus includes at least one nonreciprocal transmission line part, which includes a series branch circuit equivalently including a capacitive element and a shunt branch circuit equivalently including an inductive element. The nonreciprocal transmission line part has gyrotropic characteristic by being magnetized in a magnetization direction different from the propagation direction of a microwave, and has an asymmetric structure to a plane formed by the propagation direction and the magnetization direction. The nonreciprocal transmission line part has a propagation constant and an operating frequency set in a dispersion curve that represents a relation between the propagation constant and the operating frequency so that the propagation constant in the forward direction and the propagation constant in the backward direction have nonreciprocal phase characteristics different from each other. A microwave transmission line is constituted by cascade-connecting at least one non-reciprocal transmission line part between first and second ports.

摘要翻译： 传输线微波装置包括至少一个不可逆传输线部分，其包括等效地包括电容元件的串联分支电路和等效地包括电感元件的分流分支电路。 不可逆传输线部分通过在与微波的传播方向不同的磁化方向上磁化而具有陀螺特性，并且具有与由传播方向和磁化方向形成的平面不对称的结构。 不可逆传输线部分具有传播常数和在表示传播常数与工作频率之间的关系的色散曲线中设定的工作频率，使得正向传播常数和反向传播常数具有非相互相位 特征彼此不同。 微波传输线通过级联连接第一和第二端口之间的至少一个不可逆传输线部分而构成。

公开(公告)号：US08034707B2

公开(公告)日：2011-10-11

申请号：US12897416

申请日：2010-10-04

申请人： Tetsuya Ueda

发明人： Tetsuya Ueda

IPC分类号： H01L21/4763

CPC分类号： H01L21/76801 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device includes the steps of forming a plurality of lower interconnections at intervals in a first insulating film; removing a portion of the first insulating film located between the lower interconnections, thereby forming an interconnection-to-interconnection gap; forming a second insulating film over the first insulating film in which the lower interconnections and the interconnection-to-interconnection gap are formed such that an air gap is formed out of the interconnection-to-interconnection gap; and forming, in the second insulating film, a connection portion connected to one of the lower interconnections and an upper interconnection connected to the connection portion. The connection portion is formed to be connected to one of the lower interconnections not adjacent to the air gap.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在第一绝缘膜中间隔地形成多个下互连; 去除位于下互连之间的第一绝缘膜的一部分，从而形成互连互连间隙; 在所述第一绝缘膜上形成第二绝缘膜，其中所述下互连和互连互连间隙形成为使得从所述互连互连间隙形成气隙; 以及在所述第二绝缘膜中形成连接到所述下部互连中的一个的连接部分和连接到所述连接部分的上部互连件。 连接部分形成为连接到不邻近气隙的下互连中的一个。

公开(公告)号：US07622807B2

公开(公告)日：2009-11-24

申请号：US12277933

申请日：2008-11-25

申请人： Tetsuya Ueda

发明人： Tetsuya Ueda

IPC分类号： H01L29/40

CPC分类号： H01L21/76801 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device includes the steps of: forming a plurality of lower interconnections at intervals in a first insulating film; removing a portion of the first insulating film located between the lower interconnections, thereby forming an interconnection-to-interconnection gap; forming a second insulating film over the first insulating film in which the lower interconnections and the interconnection-to-interconnection gap are formed such that an air gap is formed out of the interconnection-to-interconnection gap; and forming, in the second insulating film, a connection portion connected to one of the lower interconnections and an upper interconnection connected to the connection portion. The connection portion is formed to be connected to one of the lower interconnections not adjacent to the air gap.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在第一绝缘膜中间隔地形成多个下互连; 去除位于下互连之间的第一绝缘膜的一部分，从而形成互连互连间隙; 在所述第一绝缘膜上形成第二绝缘膜，其中所述下互连和互连互连间隙形成为使得从所述互连互连间隙形成气隙; 以及在所述第二绝缘膜中形成连接到所述下部互连中的一个的连接部分和连接到所述连接部分的上部互连件。 连接部分形成为连接到不邻近气隙的下互连中的一个。