公开(公告)号：US20190042602A1

公开(公告)日：2019-02-07

申请号：US16105031

申请日：2018-08-20

Applicant: Ren Wang ,  Bruce Richardson ,  Tsung-Yuan Tai ,  Yipeng Wang ,  Pablo De Lara Guarch

Inventor： Ren Wang ,  Bruce Richardson ,  Tsung-Yuan Tai ,  Yipeng Wang ,  Pablo De Lara Guarch

IPC: G06F17/30

Abstract: Techniques and apparatus for dynamic data access mode processes are described. In one embodiment, for example, an apparatus may a processor, at least one memory coupled to the processor, the at least one memory comprising an indication of a database and instructions, the instructions, when executed by the processor, to cause the processor to determine a database utilization value for a database, perform a comparison of the database utilization value to at least one utilization threshold, and set an active data access mode to one of a low-utilization data access mode or a high-utilization data access mode based on the comparison. Other embodiments are described.

公开(公告)号：US20170192921A1

公开(公告)日：2017-07-06

申请号：US14987676

申请日：2016-01-04

Applicant: Ren Wang ,  Yipeng Wang ,  Andrew J. Herdrich ,  Jr-Shian Tsai ,  Tsung-Yuan C. Tai ,  Niall D. McDonnell ,  Hugh Wilkinson ,  Bradley A. Burres ,  Bruce Richardson ,  Namakkal N. Venkatesan ,  Debra Bernstein ,  Edwin Verplanke ,  Stephen R. Van Doren ,  An Yan ,  Andrew Cunningham ,  David Sonnier ,  Gage Eads ,  James T. Clee ,  Jamison D. Whitesell ,  Jerry Pirog ,  Jonathan Kenny ,  Joseph R. Hasting ,  Narender Vangati ,  Stephen Miller ,  Te K. Ma ,  William Burroughs

Inventor： Ren Wang ,  Yipeng Wang ,  Andrew J. Herdrich ,  Jr-Shian Tsai ,  Tsung-Yuan C. Tai ,  Niall D. McDonnell ,  Hugh Wilkinson ,  Bradley A. Burres ,  Bruce Richardson ,  Namakkal N. Venkatesan ,  Debra Bernstein ,  Edwin Verplanke ,  Stephen R. Van Doren ,  An Yan ,  Andrew Cunningham ,  David Sonnier ,  Gage Eads ,  James T. Clee ,  Jamison D. Whitesell ,  Jerry Pirog ,  Jonathan Kenny ,  Joseph R. Hasting ,  Narender Vangati ,  Stephen Miller ,  Te K. Ma ,  William Burroughs

IPC: G06F13/37 ,  G06F13/16 ,  G06F12/08

CPC classification number: G06F13/37 ,  G06F9/3004 ,  G06F9/46 ,  G06F12/04 ,  G06F12/0811 ,  G06F12/0868 ,  G06F13/1642 ,  G06F13/1673 ,  G06F2212/283 ,  G06F2212/6046

Abstract: Apparatus and methods implementing a hardware queue management device for reducing inter-core data transfer overhead by offloading request management and data coherency tasks from the CPU cores. The apparatus include multi-core processors, a shared L3 or last-level cache (“LLC”), and a hardware queue management device to receive, store, and process inter-core data transfer requests. The hardware queue management device further comprises a resource management system to control the rate in which the cores may submit requests to reduce core stalls and dropped requests. Additionally, software instructions are introduced to optimize communication between the cores and the queue management device.

公开(公告)号：US20240038251A1

公开(公告)日：2024-02-01

申请号：US18016856

申请日：2022-07-27

Applicant: Yipeng WANG

Inventor： Yipeng WANG

IPC: G10L21/01 ,  G10L21/028 ,  G10L21/0208 ,  G10L15/12 ,  G10L15/02 ,  G10L15/187 ,  G10L15/16 ,  G10L15/14

CPC classification number: G10L21/01 ,  G10L21/028 ,  G10L21/0208 ,  G10L15/12 ,  G10L15/02 ,  G10L15/187 ,  G10L15/16 ,  G10L15/142

Abstract: An audio data processing method is provided. The method includes: obtaining human voice audio data to be adjusted and reference human voice audio data; performing framing on the human voice audio data to be adjusted and the reference human voice audio data respectively so as to obtain a first audio frame set and a second audio frame set respectively; recognizing a pronunciation unit corresponding to each audio frame respectively; determining, based on a timestamp of each audio frame, a timestamp of each pronunciation unit in the human voice audio data to be adjusted and the reference human voice audio data respectively; and adjusting the timestamp of at least one pronunciation unit to make the timestamp of the pronunciation unit in the human voice audio data to be adjusted to be consistent with the timestamp of the corresponding pronunciation unit in the reference human voice audio data.

公开(公告)号：US20170286337A1

公开(公告)日：2017-10-05

申请号：US15087154

申请日：2016-03-31

Applicant: Ren Wang ,  Yipeng Wang ,  Jr-Shian Tsai ,  Andrew Herdrich ,  Tsung-Yuan Tai ,  Niall McDonnell ,  Stephen Van Doren ,  David Sonnier ,  Debra Bernstein ,  Hugh Wilkinson ,  Narender Vangati ,  Stephen Miller ,  Gage Eads ,  Andrew Cunningham ,  Jonathan Kenny ,  Bruce Richardson ,  William Burroughs ,  Joseph Hasting ,  An Yan ,  James Clee ,  Te Ma ,  Jerry Pirog ,  Jamison Whitesell

Inventor： Ren Wang ,  Yipeng Wang ,  Jr-Shian Tsai ,  Andrew Herdrich ,  Tsung-Yuan Tai ,  Niall McDonnell ,  Stephen Van Doren ,  David Sonnier ,  Debra Bernstein ,  Hugh Wilkinson ,  Narender Vangati ,  Stephen Miller ,  Gage Eads ,  Andrew Cunningham ,  Jonathan Kenny ,  Bruce Richardson ,  William Burroughs ,  Joseph Hasting ,  An Yan ,  James Clee ,  Te Ma ,  Jerry Pirog ,  Jamison Whitesell

IPC: G06F13/36 ,  G06F13/40 ,  G06F12/10 ,  G06F13/24

CPC classification number: G06F13/36 ,  G06F12/1027 ,  G06F13/24 ,  G06F13/4004 ,  G06F2212/1021 ,  G06F2212/50 ,  G06F2212/68

Abstract: Technologies for a distributed hardware queue manager include a compute device having a procesor. The processor includes two or more hardware queue managers as well as two or more processor cores. Each processor core can enqueue or dequeue data from the hardware queue manager. Each hardware queue manager can be configured to contain several queue data structures. In some embodiments, the queues are addressed by the processor cores using virtual queue addresses, which are translated into physical queue addresses for accessing the corresponding hardware queue manager. The virtual queues can be moved from one physical queue in one hardware queue manager to a different physical queue in a different physical queue manager without changing the virtual address of the virtual queue.

公开(公告)号：US20110236903A1

公开(公告)日：2011-09-29

申请号：US13132878

申请日：2009-12-04

Applicant: Michael McClelland ,  Yipeng Wang ,  Daniel Mercola

Inventor： Michael McClelland ,  Yipeng Wang ,  Daniel Mercola

IPC: C12Q1/68 ,  C12Q1/02 ,  G06F19/00

CPC classification number: C12Q1/6886 ,  C12Q2600/112 ,  C12Q2600/118 ,  C12Q2600/136 ,  C12Q2600/158 ,  G01N33/57434 ,  G01N2800/56

Abstract: Materials and Methods related to diagnosing and/or determining prognosis of prostate cancer.

Abstract translation: 与诊断和/或确定前列腺癌预后相关的材料和方法。

公开(公告)号：US20240220261A1

公开(公告)日：2024-07-04

申请号：US18091618

申请日：2022-12-30

Applicant: Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG

Inventor： Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG

IPC: G06F9/30

CPC classification number: G06F9/30185 ,  G06F9/30196

Abstract: Techniques for conditional move operations using a single instruction are described. An example instruction at least includes a prefix, one or more fields to identify a first source operand location, one or more fields to identify a destination operand location, and an opcode to indicate execution circuitry is to conditionally move data from the identified first source operand to the identified destination operand based at least in part on evaluation of a condition code, wherein a payload of the prefix is to provide most significant bits to identify at least one of the first and second source operand locations.

公开(公告)号：US20240220260A1

公开(公告)日：2024-07-04

申请号：US18091599

申请日：2022-12-30

Applicant: Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG ,  Jonathan COMBS ,  Jeff WIEDEMEIER

Inventor： Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG ,  Jonathan COMBS ,  Jeff WIEDEMEIER

IPC: G06F9/30

CPC classification number: G06F9/30185 ,  G06F9/30189 ,  G06F9/30196

Abstract: Techniques for accessing 32 general purpose registers, suppressing flags, and/or using a new data destination for an instance of a single instruction are described. An example of a single instruction to at least include a prefix and an opcode to indicate execution circuitry is to do perform a particular operation, wherein the prefix comprises at least two bytes and a second of the two bytes of the prefix is to provide most significant bits for at least register identifier.

公开(公告)号：US20240220257A1

公开(公告)日：2024-07-04

申请号：US18091606

申请日：2022-12-30

Applicant: Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG

Inventor： Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG

IPC: G06F9/30

CPC classification number: G06F9/30145 ,  G06F9/30043 ,  G06F9/30185

Abstract: Techniques for push or pop operations using a single instruction are described. An example instruction at least include a prefix, one or more fields to identify a first source operand location, one or more fields to identify a second source operand location, and an opcode to indicate execution circuitry is to do push data from the identified first source operand and the identified second source operand onto a stack, wherein a payload of the prefix to provide most significant bits to identify at least one of the first and second source operand locations.

公开(公告)号：US20180205653A1

公开(公告)日：2018-07-19

申请号：US15638102

申请日：2017-06-29

Applicant: Ren Wang ,  Tsung-Yuan C. Tai ,  Yipeng Wang ,  Sameh Gobriel

Inventor： Ren Wang ,  Tsung-Yuan C. Tai ,  Yipeng Wang ,  Sameh Gobriel

IPC: H04L12/743 ,  H04L12/741 ,  H04L29/12

CPC classification number: H04L45/7453 ,  H04L45/02 ,  H04L45/745 ,  H04L47/2441 ,  H04L61/10 ,  H04L61/2046

Abstract: Apparatus, methods, and systems for tuple space search-based flow classification using cuckoo hash tables and unmasked packet headers are described herein. A device can communicate with one or more hardware switches. The device can include memory to store hash table entries of a hash table. The device can include processing circuitry to perform a hash lookup in the hash table. The lookup can be based on an unmasked key include in a packet header corresponding to a received data packet. The processing circuitry can retrieve an index pointing to a sub-table, the sub-table including a set of rules for handling the data packet. Other embodiments are also described.

公开(公告)号：US20240220262A1

公开(公告)日：2024-07-04

申请号：US18091628

申请日：2022-12-30

Applicant: Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG

Inventor： Jason AGRON ,  Ching-Tsun CHOU ,  Sebastian WINKEL ,  Tyler SONDAG ,  David SHEFFIELD ,  Leela Kamalesh YADLAPALLI ,  Yipeng WANG

IPC: G06F9/30

CPC classification number: G06F9/30185 ,  G06F9/3004 ,  G06F9/30094

Abstract: Techniques for conditional test or comparison using a single instruction are described. An example instruction includes one or more fields to identify a first source operand location, one or more fields to identify a first source operand location, and an opcode to indicate execution circuitry is to conditionally perform a comparison of data from the identified first source operand to the identified second source operand based at least in part on an evaluation of a source condition code and update a flags register, wherein a payload of the prefix is to provide most significant bits to identify at least one of the first and second source operand locations.