公开(公告)号：US09606138B2

公开(公告)日：2017-03-28

申请号：US14377217

申请日：2013-01-21

申请人： Yuki Chiba ,  Yoji Miyazaki

发明人： Yuki Chiba ,  Yoji Miyazaki

IPC分类号： G06F15/18 ,  G01P13/00 ,  A61B5/11 ,  G06N99/00 ,  A61B5/00

CPC分类号： G01P13/00 ,  A61B5/0022 ,  A61B5/1116 ,  A61B5/1117 ,  A61B5/1118 ,  A61B5/1123 ,  A61B5/6898 ,  A61B5/7264 ,  A61B5/7282 ,  A61B2562/0219 ,  G06N99/005

摘要： Provided are a motion recognition apparatus, a motion recognition system and a motion recognition method that enable ‘event motions’ to be recognized with a small number of calculations. The motion recognition system, which recognizes user motions by using sensor data, is configured to be provided with: a cyclical loss detection means for detecting cyclical losses of sensor data when a user is moving; and a recognition processing means for setting data intervals to be used for recognizing motions in accordance with the cyclical losses of sensor data that were detected, and for recognizing user motions on the basis of sensor data for the data intervals that have been set.

公开(公告)号：US08859430B2

公开(公告)日：2014-10-14

申请号：US13530546

申请日：2012-06-22

申请人： Yuki Chiba

发明人： Yuki Chiba

IPC分类号： H01L21/311

CPC分类号： H01L21/02118 ,  H01L21/02274 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76831 ,  H01L2221/1063

摘要： A method for protecting an exposed low-k surface is described. The method includes providing a substrate having a low-k insulation layer formed thereon and one or more mask layers overlying the low-k insulation layer with a pattern formed therein. Additionally, the method includes transferring the pattern in the one or more mask layers to the low-k insulation layer using one or more etching processes to form a trench and/or via structure in the low-k insulation layer. The method further includes forming an insulation protection layer on exposed surfaces of the trench and/or via structure during and/or following the one or more etching processes by exposing the substrate to a film forming compound containing C, H, and N. Thereafter, the method includes removing at least a portion of the one or more mask layers using a mask removal process.

摘要翻译： 描述了一种用于保护暴露的低k表面的方法。 该方法包括提供其上形成有低k绝缘层的衬底和覆盖低k绝缘层的一个或多个掩模层，其中形成有图案。 此外，该方法包括使用一个或多个蚀刻工艺将一个或多个掩模层中的图案转移到低k绝缘层，以在低k绝缘层中形成沟槽和/或通孔结构。 该方法还包括在将一个或多个蚀刻工艺期间和/或之后的沟槽和/或通孔结构的暴露表面上形成绝缘保护层，通过将衬底暴露于含有C，H和N的成膜化合物。此后， 该方法包括使用掩模移除过程去除一个或多个掩模层的至少一部分。

公开(公告)号：US20140195300A1

公开(公告)日：2014-07-10

申请号：US14238882

申请日：2012-07-23

申请人： Yuki Chiba ,  Yoji Miyazaki

发明人： Yuki Chiba ,  Yoji Miyazaki

IPC分类号： G06Q30/02

CPC分类号： G06Q30/0201 ,  G01C21/3682 ,  H04W4/021

摘要： A site of interest extraction apparatus (10) includes: a passage section identification unit (4) that, for each user (20), renders a virtual line on a map using position information and direction information based on map information and on grid information identifying a plurality of sections, and identifies sections through which the virtual line passes, the position information and direction information being acquired for each user from a terminal device (21) owned by the user, and the virtual line being defined by the position information and direction information; an interest degree calculation unit (5) that, for each identified section, calculates an interest degree by adding a score in accordance with the virtual lines passing through the section; and a site of interest extraction unit (6) that selects one section based on the interest degrees and extracts the selected section as a site of interest to a plurality of users (20).

摘要翻译： 感兴趣场所提取装置（10）包括：通过部分识别单元（4），对于每个用户（20），使用基于地图信息的位置信息和方向信息以及网格信息识别在地图上呈现虚拟线 多个部分，并且从用户所拥有的终端设备（21）识别虚拟线路通过的部分，为每个用户获取的位置信息和方向信息，虚拟线路由位置信息和方向 信息; 感兴趣度计算单元（5），对于每个所识别的部分，通过根据穿过该部分的虚拟线添加分数来计算兴趣度; 和感兴趣提取单元（6），其基于所述兴趣度选择一个部分，并将所选择的部分提取为多个用户的关注点（20）。

公开(公告)号：US20100248473A1

公开(公告)日：2010-09-30

申请号：US12414917

申请日：2009-03-31

申请人： Tadahiro Ishizaka ,  Shigeru Mizuno ,  Satohiko Hoshino ,  Hiroyuki Nagai ,  Yuki Chiba ,  Frank M. Cerio, JR.

发明人： Tadahiro Ishizaka ,  Shigeru Mizuno ,  Satohiko Hoshino ,  Hiroyuki Nagai ,  Yuki Chiba ,  Frank M. Cerio, JR.

IPC分类号： H01L21/768 ,  H01L21/3205

CPC分类号： H01L21/76849 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76883

摘要： A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor.

摘要翻译： 一种用于将含金属盖层整合到半导体器件的铜（Cu）金属化中的方法。 在一个实施例中，该方法包括提供含有金属表面和电介质层表面的图案化衬底，以及通过暴露于含有疏水官能团的反应气体来修饰电介质层表面，其中修饰取代介电层表面中的亲水性官能团 具有疏水官能团。 该方法还包括通过将改性的介电层表面和金属表面暴露于含有金属的前体蒸气的沉积气体中，将金属含有的盖层选择性地沉积在金属表面上。

公开(公告)号：US20090029558A1

公开(公告)日：2009-01-29

申请号：US12216155

申请日：2008-06-30

申请人： Yuki Chiba

发明人： Yuki Chiba

IPC分类号： G06F19/00 ,  H01L21/302

CPC分类号： H01L21/31138 ,  H01J37/3244 ,  H01J37/32449 ,  H01L21/02063 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76814 ,  H01L21/76826

摘要： The present invention relates to a method of manufacturing a semiconductor device using a substrate including an organic low dielectric constant film containing a silicon, a carbon, an oxygen, and a hydrogen, with a resist pattern being formed on an upper layer side of the low dielectric constant film. The method comprising: an etching step in which the low dielectric constant film is etched by a plasma; an ashing step following to the etching step, in which the resist pattern is ashed by a plasma that is rich in oxygen radicals in such a manner that a relative dielectric constant of the low dielectric constant film can become 5.2 or more; and a recovering step following to the ashing step, in which an organic gas is supplied to the low dielectric constant film so as to recovery a damage of the low dielectric constant film caused by the plasma.

摘要翻译： 本发明涉及一种使用包含含有硅，碳，氧和氢的有机低介电常数膜的基板的半导体器件的制造方法，其中抗蚀剂图案形成在低层的上层侧 介电常数膜。 该方法包括：蚀刻步骤，其中通过等离子体蚀刻低介电常数膜; 在蚀刻步骤之后的灰化步骤，其中抗蚀剂图案以能够使低介电常数膜的相对介电常数达到5.2以上的方式被富含氧自由基的等离子体灰化; 以及在灰化步骤之后的恢复步骤，其中向低介电常数膜提供有机气体，以便恢复由等离子体引起的低介电常数膜的损坏。

公开(公告)号：US20130096982A1

公开(公告)日：2013-04-18

申请号：US13704675

申请日：2011-06-13

申请人： Yoji Miyazaki ,  Yuki Chiba

发明人： Yoji Miyazaki ,  Yuki Chiba

IPC分类号： G06Q30/02

CPC分类号： G06Q30/0201 ,  G06Q30/0242

摘要： An interest level estimation apparatus 10 is provided with an interest level estimation unit 11 that, using at least one of environmental information specifying an environment of every section within a specific space 100 and position information specifying a position of every section, and visitor number information specifying, for every section, the number of people visiting the section, estimates, for every section, a level of interest indicating a level to which people visiting the section are interested in the section.

摘要翻译： 感兴趣度估计装置10设置有兴趣度估计单元11，其使用指定特定空间100内的每个区段的环境的环境信息和指定每个区段的位置的位置信息和指定的位置信息中的至少一个 对于每个部分，访问该部分的人数估计，对于每个部分，表示访问该部分的人对该部分感兴趣的级别的兴趣水平。

公开(公告)号：US08242019B2

公开(公告)日：2012-08-14

申请号：US12414917

申请日：2009-03-31

申请人： Tadahiro Ishizaka ,  Shigeru Mizuno ,  Satohiko Hoshino ,  Hiroyuki Nagai ,  Yuki Chiba ,  Frank M. Cerio, Jr.

发明人： Tadahiro Ishizaka ,  Shigeru Mizuno ,  Satohiko Hoshino ,  Hiroyuki Nagai ,  Yuki Chiba ,  Frank M. Cerio, Jr.

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L21/302

CPC分类号： H01L21/76849 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76883

摘要： A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor.

摘要翻译： 一种用于将含金属盖层整合到半导体器件的铜（Cu）金属化中的方法。 在一个实施例中，该方法包括提供含有金属表面和电介质层表面的图案化衬底，以及通过暴露于含有疏水官能团的反应气体来修饰电介质层表面，其中修饰取代介电层表面中的亲水性官能团 具有疏水官能团。 该方法还包括通过将改性的介电层表面和金属表面暴露于含有金属的前体蒸气的沉积气体中，将金属含有的盖层选择性地沉积在金属表面上。

公开(公告)号：US20090011605A1

公开(公告)日：2009-01-08

申请号：US12216154

申请日：2008-06-30

申请人： Yuki Chiba ,  Eiichi Nishimura ,  Ryuichi Asako

发明人： Yuki Chiba ,  Eiichi Nishimura ,  Ryuichi Asako

IPC分类号： H01L21/3065

CPC分类号： H01L21/02063 ,  H01J37/32522 ,  H01J2237/2001 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76826

摘要： The present invention is an apparatus for manufacturing a semiconductor device comprising: a process vessel including a stage on which a substrate is placed, the substrate having a low dielectric constant film with a resist pattern being formed in an upper layer of the low dielectric constant film; an etching-gas supply unit that supplies an etching gas into the process vessel so as to etch the low dielectric constant film; an ashing-gas unit means that supplies an ashing gas into the process vessel so as to ash the resist pattern formed in the upper layer of the low dielectric constant film after the low dielectric constant film has been subjected to an etching process; a plasma generating means that generates a plasma by supplying an energy to the etching gas and the ashing gas in the process vessel; a unit that supplies a dipivaloylmethane gas into the process vessel, after the low dielectric constant film has been subjected to an ashing process, in order to recover a damage layer of the low dielectric constant film which has been damaged by the plasma; and a heating unit that enables the dipivaloylmethane gas to come into contact with a surface of the substrate under a heated condition.

摘要翻译： 本发明是一种半导体器件的制造装置，其特征在于，包括：处理容器，其具有载置基板的载物台，所述基板具有低介电常数膜，所述低介电常数膜形成在所述低介电常数膜的上层中 ; 蚀刻气体供给单元，其将蚀刻气体供给到所述处理容器中，以蚀刻所述低介电常数膜; 灰化单元意味着在低介电常数薄膜进行了蚀刻处理之后，将灰化气体供给到处理容器中，以使在低介电常数膜的上层形成的抗蚀剂图案灰化; 等离子体产生装置，其通过向处理容器中的蚀刻气体和灰化气体供应能量来产生等离子体; 在低介电常数薄膜已进行灰化处理之后，向该处理容器中供给二过代甲烷气体的单元，以回收已被等离子体损坏的低介电常数膜的损伤层; 以及加热单元，其使得二辛酰甲烷气体在加热条件下与基材的表面接触。

公开(公告)号：US20080194115A1

公开(公告)日：2008-08-14

申请号：US12025359

申请日：2008-02-04

申请人： Kazuhiro KUBOTA ,  Naotsugu Hoshi ,  Yuki Chiba ,  Ryuichi Asako

发明人： Kazuhiro KUBOTA ,  Naotsugu Hoshi ,  Yuki Chiba ,  Ryuichi Asako

IPC分类号： H01L21/469

CPC分类号： H01L21/76802 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76835

摘要： A processing method includes a gas having a Si—CH3 bond supplied into a processing chamber after a target substrate to be processed is loaded into the processing chamber; and a silylation process performed on the target substrate. The internal pressure of the chamber by the supply of the gas having the Si—CH3 bond and the gas supply time are set to be within ranges where the silylation process can be performed while the internal pressure of the chamber is decreased to reach an eligible pressure level where the wafer can be unloaded after the internal pressure of the chamber is increased up to a preset pressure by the supply of the gas.

摘要翻译： 处理方法包括在待处理的目标基板被加载到处理室中之后提供到处理室中的具有Si-CH 3键的气体; 和在靶基质上进行的甲硅烷基化处理。 通过供给具有Si-CH 3键的气体和气体供给时间，室的内部压力被设定在能够进行甲硅烷化处理的范围内，同时， 室降低到合格的压力水平，其中通过气体的供应将室的内部压力增加到预定压力之后可以卸载晶片。

公开(公告)号：US20080045025A1

公开(公告)日：2008-02-21

申请号：US11840767

申请日：2007-08-17

申请人： Ryuichi ASAKO ,  Yuki CHIBA ,  Kazuhiro KUBOTA

发明人： Ryuichi ASAKO ,  Yuki CHIBA ,  Kazuhiro KUBOTA

IPC分类号： H01L21/302

CPC分类号： H01L21/31138 ,  H01L21/02063 ,  H01L21/31058 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76826

摘要： A method includes forming an etching mask having a predetermined circuit pattern on an Si-containing low dielectric constant film disposed on a semiconductor substrate; performing etching on the Si-containing low dielectric constant film through the etching mask by use of an F-containing gas, thereby forming a groove or hole; performing ashing by use of NH3 gas after said etching, thereby removing the etching mask; removing a by-product generated during said ashing; and then supplying a predetermined recovery gas, thereby recovering damage of the Si-containing low dielectric constant film caused before or in said removing the etching mask.

摘要翻译： 一种方法包括在设置在半导体衬底上的含Si低介电常数膜上形成具有预定电路图形的蚀刻掩模; 通过使用含F气体通过蚀刻掩模对含Si的低介电常数膜进行蚀刻，从而形成凹槽或孔; 在所述蚀刻之后通过使用NH 3气体进行灰化，从而去除蚀刻掩模; 去除在所述灰化期间产生的副产物; 然后提供预定的回收气体，从而回收在去除蚀刻掩模之前或之中产生的含Si低介电常数膜的损坏。