公开(公告)号：US10283436B2

公开(公告)日：2019-05-07

申请号：US15783193

申请日：2017-10-13

Applicant: ABB Schweiz AG

Inventor： Juergen Schuderer ,  Fabian Mohn ,  Didier Cottet ,  Felix Traub ,  Daniel Kearney

IPC: H01L23/473 ,  H01L25/07 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L29/16

Abstract: A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler comprises a metal body providing a first terminal of the power electronics module; a second liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the second liquid cooler comprises a metal body providing a second terminal of the power electronics module; a plurality of semiconductor chips arranged between the first liquid cooler and the second liquid cooler, such that a first electrode of each semiconductor chip is bonded to the first liquid cooler, such that the first electrode is in electrical contact with the first liquid cooler, and an opposite second electrode of each semiconductor chip is in electrical contact with the second liquid cooler; and an insulating encapsulation, formed by molding the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips into an insulation material, such that the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips are at least partially embedded onto the insulation material.

公开(公告)号：US20220028822A1

公开(公告)日：2022-01-27

申请号：US17311562

申请日：2019-10-17

Applicant: ABB SCHWEIZ AG

Inventor： Didier Cottet ,  Slavo Kicin

IPC: H01L23/00

Abstract: A power semiconductor module comprises a base plate (1); a semiconductor chip (2) disposed on and in contact with a top surface of the base plate (1), a preform (3) disposed on and in contact with a top surface of the semiconductor chip (2); and a pressing element (4) in contact with and applying a pressure onto a top surface of the preform (3). The preform (3) comprises a first electrically conductive layer (6) and a second electrically conductive layer (5). The first electrically conductive layer (6) has at least one protrusion (7) protruding towards the top surface of the semiconductor chip (2) and defining a recess (9) in the first electrically conductive layer (6) of the preform (3), wherein the recess (9) may annularly surround the protrusion (7). The at least one protrusion (7) is made from the same material as the first electrically conducting layer (6) and integrally formed with it or the first electrically conducting layer (6) and the at least one protrusion (7) are made from different materials. At least a portion of the second electrically conductive layer (5) is positioned in the recess (9) and on the top surface of the semiconductor chip (2). The material of the at least one protrusion (7) has a higher melting point than the material of the second electrically conductive layer (5). The power semiconductor module is configured so that in an event of semiconductor chip failure with heat dissipation, the protrusion (7) of the first electrically conductive layer (6) penetrates through residual material (8) of the semiconductor chip (2) upon pressure applied by the pressing element (4) towards the base plate (1) so as to establish a contact between the protrusion (7) of the first electrically conductive layer (6) and the base plate (1) and form a short circuit bridging the defective semiconductor chip (2) in a short circuit failure mode. The bottom surface of the preform (3) may be formed by a bottom surface of the second electrically conductive layer (5) alone or by a bottom surface of the second electrically conductive layer (5) and a bottom surface of the protrusion (7).

公开(公告)号：US20160351697A1

公开(公告)日：2016-12-01

申请号：US15237058

申请日：2016-08-15

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Didier Cottet ,  Slavo Kicin

IPC: H01L29/739 ,  H01L29/423 ,  H01L23/00 ,  H03K17/081 ,  H01L23/02 ,  H01L27/088 ,  H01L25/07 ,  H01L29/417 ,  H01L23/64

CPC classification number: H01L29/7393 ,  H01L23/02 ,  H01L23/645 ,  H01L24/48 ,  H01L25/072 ,  H01L27/088 ,  H01L29/41708 ,  H01L29/4232 ,  H01L2224/4813 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/13055 ,  H02M1/088 ,  H03K17/0424 ,  H03K17/08116 ,  H03K17/0828 ,  H03K17/127 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal. The semiconductor switch is an IGBT and each of the first conductor path and the second conductor path comprises bridging points for connecting the respective conductor path to the auxiliary emitter terminal.

Abstract translation: 半导体模块包括半导体芯片，其包括具有集电极，发射极和栅极的半导体开关，连接到集电极的集电极端子，连接到栅极的栅极端子，经由发射极导体路径连接到发射极的发射极端子，发射极导体路径具有发射极电感 连接到发射极的辅助发射极端子，连接到发射极的第一导体路径和连接到发射极的第二导体路径，其与作为第一导体路径的发射极导体路径具有不同的互感耦合。 第一导体路径和第二导体路径可连接到辅助发射极端子和/或第一导体路径连接到辅助发射极端子，并且第二导体路径连接到第二辅助发射极端子。 半导体开关是IGBT，并且第一导体路径和第二导体路径中的每一个包括用于将相应的导体路径连接到辅助发射极端子的桥接点。

公开(公告)号：US20190304946A1

公开(公告)日：2019-10-03

申请号：US16442923

申请日：2019-06-17

Applicant: ABB Schweiz AG ,  AUDI AG

Inventor： Didier Cottet ,  Felix Traub ,  Jürgen Schuderer ,  Andreas Apelsmeier ,  Johann Asam

IPC: H01L23/00 ,  H01L25/07 ,  H01L23/64

Abstract: A power semiconductor module, including a housing; a power semiconductor chip within the housing; power terminals protruding from the housing and electrically interconnected with power electrodes of the semiconductor chip; and auxiliary terminals protruding from the housing and electrically interconnected with a gate electrode and one of the power electrodes; wherein three auxiliary terminals are arranged in a coaxial auxiliary terminal arrangement, which comprises an inner and two outer auxiliary terminals, which are arranged on opposing sides of the inner auxiliary terminal. The inner auxiliary terminal is electrically interconnected with the gate electrode or one of the power electrodes and the two outer auxiliary terminals are electrically connected with the other one of the gate electrode and the one of the power electrodes.

公开(公告)号：US20180040538A1

公开(公告)日：2018-02-08

申请号：US15783193

申请日：2017-10-13

Applicant: ABB Schweiz AG

Inventor： Juergen Schuderer ,  Fabian Mohn ,  Didier Cottet ,  Felix Traub ,  Daniel Kearney

IPC: H01L23/473 ,  H01L23/498 ,  H01L23/31 ,  H01L29/16 ,  H01L25/07 ,  H01L23/00

CPC classification number: H01L23/473 ,  H01L23/3142 ,  H01L23/49844 ,  H01L24/48 ,  H01L24/49 ,  H01L25/071 ,  H01L29/1608 ,  H01L2224/33 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler comprises a metal body providing a first terminal of the power electronics module; a second liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the second liquid cooler comprises a metal body providing a second terminal of the power electronics module; a plurality of semiconductor chips arranged between the first liquid cooler and the second liquid cooler, such that a first electrode of each semiconductor chip is bonded to the first liquid cooler, such that the first electrode is in electrical contact with the first liquid cooler, and an opposite second electrode of each semiconductor chip is in electrical contact with the second liquid cooler; and an insulating encapsulation, formed by molding the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips into an insulation material, such that the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips are at least partially embedded onto the insulation material.

公开(公告)号：US09899283B2

公开(公告)日：2018-02-20

申请号：US15599626

申请日：2017-05-19

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Didier Cottet ,  Felix Traub

IPC: H01L23/52 ,  H01L23/14 ,  H01L23/24 ,  H01L23/00

CPC classification number: H01L23/142 ,  H01L23/24 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/0603 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/1304 ,  H01L2924/19107 ,  H01L2924/30107 ,  H02M7/003

Abstract: A power module providing a half bridge comprises at least one substrate and an inner metallization area, two intermediate metallization areas and two outer metallization areas, each of which extends in a longitudinal direction of the at least one substrate; wherein the two intermediate metallization areas are arranged besides the inner metallization area with respect to a cross direction of the at least one substrate and each outer metallization area is arranged beside one of the two intermediate metallization areas with respect to the cross direction; wherein the power module comprises two inner sets of semiconductor switches, each inner set of semiconductor switches bonded to an intermediate metallization area and electrically connected to the inner metallization area, such that the inner sets of semiconductor switches form a first arm of the half bridge; wherein the power module comprises two outer sets of semiconductor switches, each outer set of semiconductor switches bonded to an outer metallization area and electrically connected to an intermediate metallization area, such that the outer sets of semiconductor switches form a second arm of the half bridge.

公开(公告)号：US11018109B2

公开(公告)日：2021-05-25

申请号：US16442923

申请日：2019-06-17

Applicant: ABB Schweiz AG ,  AUDI AG

Inventor： Didier Cottet ,  Felix Traub ,  Jürgen Schuderer ,  Andreas Apelsmeier ,  Johann Asam

IPC: H01L23/64 ,  H01L23/49 ,  H01L23/00 ,  H01L25/07 ,  H01L23/498

Abstract: A power semiconductor module, including a housing; a power semiconductor chip within the housing; power terminals protruding from the housing and electrically interconnected with power electrodes of the semiconductor chip; and auxiliary terminals protruding from the housing and electrically interconnected with a gate electrode and one of the power electrodes; wherein three auxiliary terminals are arranged in a coaxial auxiliary terminal arrangement, which comprises an inner and two outer auxiliary terminals, which are arranged on opposing sides of the inner auxiliary terminal. The inner auxiliary terminal is electrically interconnected with the gate electrode or one of the power electrodes and the two outer auxiliary terminals are electrically connected with the other one of the gate electrode and the one of the power electrodes.

公开(公告)号：US10224424B2

公开(公告)日：2019-03-05

申请号：US15237058

申请日：2016-08-15

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Didier Cottet ,  Slavo Kicin

IPC: H01L29/739 ,  H01L23/64 ,  H01L25/07 ,  H03K17/12 ,  H01L23/02 ,  H01L23/00 ,  H01L27/088 ,  H01L29/417 ,  H01L29/423 ,  H03K17/081 ,  H03K17/082 ,  H03K17/0424 ,  H02M1/088

Abstract: A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal. The semiconductor switch is an IGBT and each of the first conductor path and the second conductor path comprises bridging points for connecting the respective conductor path to the auxiliary emitter terminal.

公开(公告)号：US20170338162A1

公开(公告)日：2017-11-23

申请号：US15599626

申请日：2017-05-19

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Didier Cottet ,  Felix Traub

IPC: H01L23/14 ,  H01L23/24 ,  H01L23/00

CPC classification number: H01L23/142 ,  H01L23/24 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/0603 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/1304 ,  H01L2924/19107 ,  H01L2924/30107 ,  H02M7/003

Abstract: A power module providing a half bridge comprises at least one substrate and an inner metallization area, two intermediate metallization areas and two outer metallization areas, each of which extends in a longitudinal direction of the at least one substrate; wherein the two intermediate metallization areas are arranged besides the inner metallization area with respect to a cross direction of the at least one substrate and each outer metallization area is arranged beside one of the two intermediate metallization areas with respect to the cross direction; wherein the power module comprises two inner sets of semiconductor switches, each inner set of semiconductor switches bonded to an intermediate metallization area and electrically connected to the inner metallization area, such that the inner sets of semiconductor switches form a first arm of the half bridge; wherein the power module comprises two outer sets of semiconductor switches, each outer set of semiconductor switches bonded to an outer metallization area and electrically connected to an intermediate metallization area, such that the outer sets of semiconductor switches form a second arm of the half bridge.