公开(公告)号：US10483244B2

公开(公告)日：2019-11-19

申请号：US14878466

申请日：2015-10-08

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Franc Dugal ,  Olle Ekwall ,  Erik Doré

IPC: H01L25/07 ,  H01L23/051 ,  H01L23/492

Abstract: A power semiconductor module includes a first main electrode, a second main electrode and a control terminal. The power semiconductor module includes controllable power semiconductor components arranged between the first main electrode and the second main electrode. At least some of the controllable power semiconductor components are arranged in a ring arrangement, wherein the controllable power semiconductor components of the ring arrangement are arranged at least approximately along a first circular line of the ring arrangement, and a control conductor track of the ring arrangement is arranged on the first main electrode, wherein the control conductor track runs at least approximately along a second circular line of the ring arrangement, and the second circular line runs concentrically relative to the first circular line.

公开(公告)号：US20190279927A1

公开(公告)日：2019-09-12

申请号：US16423531

申请日：2019-05-28

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Dominik Truessel

IPC: H01L23/50 ,  H01L25/07 ,  H01L25/18 ,  H01L23/00 ,  H01L23/492

Abstract: Power semiconductor module, including a base plate with at least one substrate located on the base plate, wherein an electronic circuit is provided on the at least one substrate, wherein located on the at least one substrate are electrical connectors comprising a DC+ power terminal, a DC− power terminal and an AC power terminal and further a control connector, wherein the power semiconductor module is designed as a half-bridge module including a first amount of switching power semiconductor devices and a second amount of switching power semiconductor devices, wherein the base plate includes a contact area, a first device area and a second device area, wherein the contact area is positioned in a center of the base plate such, that the first device area is positioned at a first side of the contact area and that the second device area is positioned at a second side of the contact area, the second side being arranged opposite to the first side, wherein the DC+ power terminal, the DC− power terminal, the AC power terminal and the control connector are positioned in the contact area, wherein the first amount of switching power semiconductor devices is positioned in the first device area and wherein the second amount of switching power semiconductor devices is positioned in the second device area, wherein all the power semiconductor devices in the first device area are located in two parallel lines being aligned parallel to the width of the base plate and wherein all the power semiconductor devices in the second device area are located in two parallel lines being aligned parallel to the width of the base plate.

公开(公告)号：US20170323801A1

公开(公告)日：2017-11-09

申请号：US15658124

申请日：2017-07-24

Applicant: ABB Schweiz AG

Inventor： Venkatesh Sivasubramaniam ,  David Guillon ,  Pauline Morin ,  Remi-Alain Guillemin ,  Samuel Hartmann

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/373

CPC classification number: H01L21/4853 ,  H01L23/3735 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present application relates to a method of generating a power semiconductor module including a carrier layer and a substrate having a terminal connection area, the method comprising: soldering the substrate to the carrier layer by forming a solder layer; wherein the solder layer is formed such, that a pre-defined cavity is provided in the solder layer adjacent to the substrate and located opposite to the terminal connection area; and welding a terminal to the terminal connection area of the substrate.The present application provides a method of generating a power semiconductor module which is especially cost-saving to perform and allows a reliable generation of high quality modules.

公开(公告)号：US20190393135A1

公开(公告)日：2019-12-26

申请号：US16558906

申请日：2019-09-03

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Dominik Truessel ,  Fabian Fischer

IPC: H01L23/498 ,  H01L23/02 ,  H01R31/06 ,  H01R4/34

Abstract: A housing of a power module includes: an encasing for encasing semiconductor elements inside the housing; a power terminal area on the encasing, on which a power terminal plate is provided; an auxiliary terminal area on the encasing at a lower level than the power terminal area; and an interconnecting member with a power terminal connector part and an auxiliary terminal connector part interconnected by a spring part, the spring part is aligned besides the power terminal plate; the interconnecting member is inserted with the power terminal connector part through an opening in the encasing below the power terminal plate, such that the spring part engages the power terminal area besides the power terminal plate and runs to the auxiliary terminal area and the auxiliary terminal connector part is disposed on the auxiliary terminal area.

公开(公告)号：US20160351697A1

公开(公告)日：2016-12-01

申请号：US15237058

申请日：2016-08-15

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Didier Cottet ,  Slavo Kicin

IPC: H01L29/739 ,  H01L29/423 ,  H01L23/00 ,  H03K17/081 ,  H01L23/02 ,  H01L27/088 ,  H01L25/07 ,  H01L29/417 ,  H01L23/64

CPC classification number: H01L29/7393 ,  H01L23/02 ,  H01L23/645 ,  H01L24/48 ,  H01L25/072 ,  H01L27/088 ,  H01L29/41708 ,  H01L29/4232 ,  H01L2224/4813 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/13055 ,  H02M1/088 ,  H03K17/0424 ,  H03K17/08116 ,  H03K17/0828 ,  H03K17/127 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal. The semiconductor switch is an IGBT and each of the first conductor path and the second conductor path comprises bridging points for connecting the respective conductor path to the auxiliary emitter terminal.

Abstract translation: 半导体模块包括半导体芯片，其包括具有集电极，发射极和栅极的半导体开关，连接到集电极的集电极端子，连接到栅极的栅极端子，经由发射极导体路径连接到发射极的发射极端子，发射极导体路径具有发射极电感 连接到发射极的辅助发射极端子，连接到发射极的第一导体路径和连接到发射极的第二导体路径，其与作为第一导体路径的发射极导体路径具有不同的互感耦合。 第一导体路径和第二导体路径可连接到辅助发射极端子和/或第一导体路径连接到辅助发射极端子，并且第二导体路径连接到第二辅助发射极端子。 半导体开关是IGBT，并且第一导体路径和第二导体路径中的每一个包括用于将相应的导体路径连接到辅助发射极端子的桥接点。

公开(公告)号：US10854524B2

公开(公告)日：2020-12-01

申请号：US16531296

申请日：2019-08-05

Applicant: ABB Schweiz AG

Inventor： David Guillon ,  Charalampos Papadopoulos ,  Dominik Truessel ,  Fabian Fischer ,  Samuel Hartmann

IPC: H01L23/053 ,  H01L23/24 ,  H01L23/31 ,  H01L23/492 ,  H01L23/00

Abstract: The present application provides a power semiconductor module, including a support which carries at least one power semiconductor device, the support together with the power semiconductor device is at least partly located in a housing, the support and the power semiconductor device are at least partly covered by a sealing material, additionally to the sealing material, a protecting material is provided in the housing, the protecting material is formed from silicon gel and the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material.

公开(公告)号：US10224424B2

公开(公告)日：2019-03-05

申请号：US15237058

申请日：2016-08-15

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Didier Cottet ,  Slavo Kicin

IPC: H01L29/739 ,  H01L23/64 ,  H01L25/07 ,  H03K17/12 ,  H01L23/02 ,  H01L23/00 ,  H01L27/088 ,  H01L29/417 ,  H01L29/423 ,  H03K17/081 ,  H03K17/082 ,  H03K17/0424 ,  H02M1/088

Abstract: A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal. The semiconductor switch is an IGBT and each of the first conductor path and the second conductor path comprises bridging points for connecting the respective conductor path to the auxiliary emitter terminal.

公开(公告)号：US20190363029A1

公开(公告)日：2019-11-28

申请号：US16531296

申请日：2019-08-05

Applicant: ABB Schweiz AG

Inventor： David Guillon ,  Charalampos Papadopoulos ,  Dominik Truessel ,  Fabian Fischer ,  Samuel Hartmann

IPC: H01L23/053 ,  H01L23/24 ,  H01L23/31 ,  H01L23/00 ,  H01L23/492

Abstract: The present application provides a power semiconductor module, including a support which carries at least one power semiconductor device, the support together with the power semiconductor device is at least partly located in a housing, the support and the power semiconductor device are at least partly covered by a sealing material, additionally to the sealing material, a protecting material is provided in the housing, the protecting material is formed from silicon gel and the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material.

公开(公告)号：US10276552B2

公开(公告)日：2019-04-30

申请号：US15967233

申请日：2018-04-30

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Ulrich Schlapbach

IPC: H01L25/18 ,  H01L25/07 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538

Abstract: A semiconductor module, comprises a substrate plate; a semiconductor switch chip and a diode chip attached to a collector conductor on the substrate plate, wherein the diode chip is electrically connected antiparallel to the semiconductor switch chip; wherein the semiconductor switch chip is electrically connected via bond wires to an emitter conductor on the substrate plate providing a first emitter current path, which emitter conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; wherein a gate electrode of the semiconductor switch chip is electrically connected via a bond wire to a gate conductor on the substrate plate providing a gate current path, which gate conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; and wherein a protruding area of the emitter conductor runs besides the diode chip towards the first semiconductor switch chip and the first semiconductor switch chip is directly connected via a bond wire with the protruding area providing an additional emitter current path running at least partially along the gate current path. The semiconductor switch chip is a first semiconductor switch chip and the diode chip is a first diode chip, which are arranged in a first row. The semiconductor module comprises further a second row of a second semiconductor switch chip and a second diode chip attached to the collector conductor, wherein the diode chip of each row is electrically connected antiparallel to the semiconductor switch chip of the same row and the first and second rows are electrically connected in parallel. The first semiconductor switch chip is arranged besides the second diode chip and the second semiconductor chip is arranged besides the first diode chip.

公开(公告)号：US20180247923A1

公开(公告)日：2018-08-30

申请号：US15967233

申请日：2018-04-30

Applicant: ABB Schweiz AG

Inventor： Samuel Hartmann ,  Ulrich Schlapbach

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/538 ,  H01L23/498

CPC classification number: H01L25/18 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5381 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A semiconductor module, comprises a substrate plate; a semiconductor switch chip and a diode chip attached to a collector conductor on the substrate plate, wherein the diode chip is electrically connected antiparallel to the semiconductor switch chip; wherein the semiconductor switch chip is electrically connected via bond wires to an emitter conductor on the substrate plate providing a first emitter current path, which emitter conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; wherein a gate electrode of the semiconductor switch chip is electrically connected via a bond wire to a gate conductor on the substrate plate providing a gate current path, which gate conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; and wherein a protruding area of the emitter conductor runs besides the diode chip towards the first semiconductor switch chip and the first semiconductor switch chip is directly connected via a bond wire with the protruding area providing an additional emitter current path running at least partially along the gate current path. The semiconductor switch chip is a first semiconductor switch chip and the diode chip is a first diode chip, which are arranged in a first row. The semiconductor module comprises further a second row of a second semiconductor switch chip and a second diode chip attached to the collector conductor, wherein the diode chip of each row is electrically connected antiparallel to the semiconductor switch chip of the same row and the first and second rows are electrically connected in parallel. The first semiconductor switch chip is arranged besides the second diode chip and the second semiconductor chip is arranged besides the first diode chip.