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    VLIW Dynamic Communication
    1.
    发明公开
    VLIW Dynamic Communication 审中-公开

    公开(公告)号：US20230409336A1

    公开(公告)日：2023-12-21

    申请号：US17843640

    申请日：2022-06-17

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Sriseshan Srikanth ,  Karthik Ramu Sangaiah ,  Anthony Thomas Gutierrez ,  Vedula Venkata Srikant Bharadwaj ,  John Kalamatianos

    IPC: G06F9/38 ,  G06F9/32

    CPC classification number: G06F9/3853 ,  G06F9/3885 ,  G06F9/321

    Abstract: In accordance with described techniques for VLIW Dynamic Communication, an instruction that causes dynamic communication of data to at least one processing element of a very long instruction word (VLIW) machine is dispatched to a plurality of processing elements of the VLIW machine. A first count of data communications issued by the plurality of processing elements and a second count of data communications served by the plurality of processing elements are maintained. At least one additional instruction is determined for dispatch to the plurality of processing elements of the VLIW machine based on the first count and the second count. For example, an instruction that is independent of the instruction is determined for dispatch while the first count and the second count are unequal, and an instruction that is dependent on the instruction is determined for dispatch based on the first count and the second count being equal.

    ADAPTIVE FLOATING POINT INFERENCE PERFORMANCE FOR SYSTEMS WITH UNRELIABLE MEMORY
    4.
    发明公开
    ADAPTIVE FLOATING POINT INFERENCE PERFORMANCE FOR SYSTEMS WITH UNRELIABLE MEMORY 审中-公开

    公开(公告)号：US20230306256A1

    公开(公告)日：2023-09-28

    申请号：US17705066

    申请日：2022-03-25

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Sriseshan Srikanth ,  SeyedMohammad SeyedzadehDelcheh

    IPC: G06N3/08 ,  G06N5/04

    CPC classification number: G06N3/08 ,  G06N5/04

    Abstract: Systems, apparatuses, and methods for scattering floating point values to heterogeneous memory devices are disclosed. An inference engine performs floating point calculations during pre-training and during post-training operations. A scatter unit stores the floating point number values in multiple memories with different error correction capabilities. A first portion of each floating point number value is stored in a first memory having a relatively high error correction capability, and a second portion of each floating point number value is stored in a second memory with a relatively low error correction capability. In one scenario, the first portion includes the sign and exponent fields, while the second portion includes the mantissa field. The resiliency of the inference engine to overcome small errors allows for convergence to the final result in spite of any errors in the retrieved second portion.

    ERROR DETECTION AT LAYERS OF A NEURAL NETWORK
    7.
    发明申请
    ERROR DETECTION AT LAYERS OF A NEURAL NETWORK 有权

    公开(公告)号：US20230128916A1

    公开(公告)日：2023-04-27

    申请号：US17511777

    申请日：2021-10-27

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Sriseshan Srikanth ,  SeyedMohammad SeyedzadehDelcheh

    IPC: G06F11/07 ,  G06K9/62 ,  G06N3/04

    Abstract: A processing system performs error detection at each of a plurality of layers of a neural network, such as a neural network implemented at a computational analog memory. By performing error detection at the layer level, the processing system is able to account for write errors when updating neural network weights, without waiting for backpropagation based on an output of the neural network. The processing system thereby reduces the amount of time needed to train the network, both by reducing the number of training epochs, and by reducing the length of the individual training epochs.

    Page swapping to protect memory devices
    8.
    发明授权
    Page swapping to protect memory devices 有权

    公开(公告)号：US12026387B2

    公开(公告)日：2024-07-02

    申请号：US17703491

    申请日：2022-03-24

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Seyedmohammad SeyedzadehDelcheh ,  Sriseshan Srikanth

    IPC: G06F3/06

    CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0673

    Abstract: A page swapping memory protection system tracks accesses to physical memory pages, such as in a table with each row storing a physical memory page address and a counter value. This counter value records the number of accesses (e.g., read access or write accesses) to the corresponding physical memory page. In response to one of the counters exceeding a threshold value, the corresponding physical memory page is swapped with another page in physical memory (e.g., a page the table indicates has a smallest number of accesses). According, unreliability in the physical memory introduced due to frequent accesses to a particular physical memory page is mitigated.

    Page Swapping To Protect Memory Devices
    9.
    发明公开
    Page Swapping To Protect Memory Devices 审中-公开

    公开(公告)号：US20230315320A1

    公开(公告)日：2023-10-05

    申请号：US17703491

    申请日：2022-03-24

    Applicant: Advanced Micro Devices, Inc.

    Inventor： SeyedMohammad SeyedzadehDelcheh ,  Sriseshan Srikanth

    IPC: G06F3/06

    CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0673

    Abstract: A page swapping memory protection system tracks accesses to physical memory pages, such as in a table with each row storing a physical memory page address and a counter value. This counter value records the number of accesses (e.g., read access or write accesses) to the corresponding physical memory page. In response to one of the counters exceeding a threshold value, the corresponding physical memory page is swapped with another page in physical memory (e.g., a page the table indicates has a smallest number of accesses). According, unreliability in the physical memory introduced due to frequent accesses to a particular physical memory page is mitigated.

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