Optical sensor circuit, luminous panel and method for operating an optical sensor circuit
    2.
    发明授权
    Optical sensor circuit, luminous panel and method for operating an optical sensor circuit 有权
    光传感器电路,发光板及操作光传感器电路的方法

    公开(公告)号:US09480122B2

    公开(公告)日:2016-10-25

    申请号:US14276960

    申请日:2014-05-13

    Applicant: ams AG

    CPC classification number: H05B33/0872 H05B33/0851

    Abstract: An optical sensor circuit comprises an optical sensor (DET) designed to provide a sensor signal indicative of light incident on the optical sensor (DET). A clock terminal (CLK) is used to receive a clocked control signal comprising high and low states. A controller unit (CU) is connected to the optical sensor (DET) and to the clock terminal (CLK). The controller unit (CU) is designed to process the sensor signal as a color signal (CTS) in a first mode if the clocked control signal is in high state, and process the sensor signal as an ambient light signal (ALS) in a second mode if the clocked control signal is in low state, and further designed to generate a driving signal (PWM) to drive a light emitting device (LED) to be connected at a control terminal (OUT). The driving signal (PWM) depends on the color and ambient light signal (CTS, ALS).

    Abstract translation: 光学传感器电路包括设计成提供表示入射在光学传感器(DET)上的光的传感器信号的光学传感器(DET)。 时钟端子(CLK)用于接收包括高和低状态的定时控制信号。 控制器单元(CU)连接到光学传感器(DET)和时钟端子(CLK)。 控制器单元(CU)被设计成如果时钟控制信号处于高电平状态,则以第一模式将传感器信号作为彩色信号(CTS)处理,并将传感器信号作为环境光信号(ALS)处理 如果时钟控制信号处于低电平状态,并进一步被设计为产生驱动信号(PWM)以驱动在控制端(OUT)处连接的发光器件(LED)。 驱动信号(PWM)取决于颜色和环境光信号(CTS,ALS)。

    Module circuit, display module and method for providing an output signal

    公开(公告)号:US10360874B2

    公开(公告)日:2019-07-23

    申请号:US14361289

    申请日:2012-11-07

    Applicant: ams AG

    Inventor: Peter Trattler

    Abstract: A module circuit (11) comprises a sensor terminal (43) for feeding a sensor signal (SP) and a clock terminal (41) for feeding a pulse width-modulated clock signal (ST) having a first and a second clock phase (A, B). A signal processing circuit (40) of the module circuit (11) is coupled on the input side to the sensor terminal (43) and the clock terminal (41) and is designed to provide an output signal (SAL) dependent on the sensor signal (SP) that can be tapped in the first clock phase (A) and independent of the sensor signal (SP) that can be tapped in the second clock phase (B).

    MODULE CIRCUIT, DISPLAY MODULE AND METHOD FOR PROVIDING AN OUTPUT SIGNAL
    5.
    发明申请
    MODULE CIRCUIT, DISPLAY MODULE AND METHOD FOR PROVIDING AN OUTPUT SIGNAL 审中-公开
    模块电路,显示模块和提供输出信号的方法

    公开(公告)号:US20140313175A1

    公开(公告)日:2014-10-23

    申请号:US14361289

    申请日:2012-11-07

    Applicant: ams AG

    Inventor: Peter Trattler

    CPC classification number: G09G5/10 G09G3/3406 G09G2320/064 G09G2360/144

    Abstract: A module circuit (11) comprises a sensor terminal (43) for feeding a sensor signal (SP) and a clock terminal (41) for feeding a pulse width-modulated clock signal (ST) having a first and a second clock phase (A, B). A signal processing circuit (40) of the module circuit (11) is coupled on the input side to the sensor terminal (43) and the clock terminal (41) and is designed to provide an output signal (SAL) dependent on the sensor signal (SP) that can be tapped in the first clock phase (A) and independent of the sensor signal (SP) that can be tapped in the second clock phase (B).

    Abstract translation: 模块电路(11)包括用于馈送传感器信号(SP)的传感器端子(43)和用于馈送具有第一和第二时钟相位(A)的脉宽调制时钟信号(ST)的时钟端子(41) ,B)。 模块电路(11)的信号处理电路(40)在输入侧耦合到传感器端子(43)和时钟端子(41),并被设计成提供取决于传感器信号的输出信号(SAL) (SP),其可以在第一时钟相位(A)中被抽头,并且独立于可以在第二时钟相位(B)中抽头的传感器信号(SP)。

    Circuit arrangement for an optical monitoring system and method for optical monitoring

    公开(公告)号:US10925497B2

    公开(公告)日:2021-02-23

    申请号:US15752238

    申请日:2016-08-17

    Applicant: ams AG

    Abstract: A circuit arrangement for an optical monitoring system comprises a driver circuit configured to generate at least one driving signal for driving a light source and a detector terminal for receiving a detector current. The circuit arrangement further comprises a current source configured and arranged to generate at the detector terminal a reduction current. The reduction current has an amplitude which is given by a base value whenever none of the least one driving signal assumes a value suitable for activating the light source and by a sum of the base value and a reduction value otherwise. The circuit arrangement also comprises a processing unit configured to generate an output signal depending on a combination of the detector current and the reduction current.

    CIRCUIT ARRANGEMENT FOR AN OPTICAL MONITORING SYSTEM AND METHOD FOR OPTICAL MONITORING

    公开(公告)号:US20200178865A1

    公开(公告)日:2020-06-11

    申请号:US16614457

    申请日:2018-05-15

    Applicant: ams AG

    Abstract: A circuit arrangement for an optical monitoring system comprises a driver circuit which is configured to generate at least one driving signal for driving the light source. A detector terminal is arranged for receiving a detector current from an optical detector. A gain stage is connected at its input side to the driver circuit for receiving the driving signal and generates a noise signal depending on the driving signal. A processing unit is configured to generate an output signal depending on the detector current and the noise signal.

    Flash driver to limit a load current of a flash and method to limit a load current of a flash driver
    10.
    发明授权
    Flash driver to limit a load current of a flash and method to limit a load current of a flash driver 有权
    闪光驱动器限制闪光灯的负载电流和限制闪存驱动器的负载电流的方法

    公开(公告)号:US08981653B2

    公开(公告)日:2015-03-17

    申请号:US13840032

    申请日:2013-03-15

    Applicant: ams AG

    CPC classification number: G03B15/05 H05B33/0815 H05B33/0824 Y02B20/347

    Abstract: A flash driver to limit a load current for a flash comprises a dc/dc converter (DCDC) having a first input (IN1) to receive an input voltage (Vin) and an output (OUT) to supply an output voltage (Vout). The dc/dc converter is designed to convert the input voltage (Vin) to the output voltage (Vout). Furthermore the flash driver has an adjustable current source (Iadj) connected between the output (OUT) and a load terminal (LT). A first control unit (CTRL—1) is connected to the first input (IN1) and coupled to the adjustable current source (Iadj), and is designed to compare the input voltage (Vin) to a threshold (Vth) and, if the comparison indicates the input voltage (Vin) being smaller than the threshold value (Vth), adjust the adjustable current source (Iadj) such that the input voltage (Vin) is equal or greater than the threshold value (Vth). A second control unit (CTRL—2) is coupled to the adjustable current source (Iadj) and the dc/dc converter (DCDC) and is designed to detect a voltage drop over the adjustable current source (Iadj) and to set the dc/dc converter (DCDC) to control the conversion of input voltage (Vin) to the output voltage (Vout) depending on the detected voltage drop.

    Abstract translation: 用于限制闪光灯的负载电流的闪光驱动器包括具有接收输入电压(Vin)的第一输入(IN1)和用于提供输出电压(Vout)的输出(OUT)的DC / DC转换器(DCDC)。 DC / DC转换器用于将输入电压(Vin)转换为输出电压(Vout)。 此外,闪存驱动器具有连接在输出(OUT)和负载端子(LT)之间的可调电流源(Iadj)。 第一控制单元(CTRL-1)连接到第一输入端(IN1)并耦合到可调电流源(Iadj),并被设计为将输入电压(Vin)与阈值(Vth)进行比较,如果 比较表示输入电压(Vin)小于阈值(Vth),调节可调电流源(Iadj),使得输入电压(Vin)等于或大于阈值(Vth)。 第二控制单元(CTRL-2)耦合到可调电流源(Iadj)和dc / dc转换器(DCDC),并被设计成检测可调电流源(Iadj)上的电压降,并设置直流/ DC转换器(DCDC),以根据检测到的电压降来控制输入电压(Vin)到输出电压(Vout)的转换。

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