公开(公告)号：US20200333774A1

公开(公告)日：2020-10-22

申请号：US16946784

申请日：2020-07-06

Applicant: Applied Materials, Inc.

Inventor： Samer BANNA

IPC: G05B19/418 ,  H01L21/67

Abstract: Systems and methods for controlling device performance variability during manufacturing of a device on wafers are disclosed. The system includes a process platform, on-board metrology (OBM) tools, and a first server that stores a machine-learning based process control model. The first server combines virtual metrology (VM) data and OBM data to predict a spatial distribution of one or more dimensions of interest on a wafer. The system further comprises an in-line metrology tool, such as SEM, to measure the one or more dimensions of interest on a subset of wafers sampled from each lot. A second server having a machine-learning engine receives from the first server the predicted spatial distribution of the one or more dimensions of interest based on VM and OBM, and also receives SEM metrology data, and updates the process control model periodically (e.g., to account for chamber-to-chamber variability) using machine learning techniques.

公开(公告)号：US20150181684A1

公开(公告)日：2015-06-25

申请号：US14543316

申请日：2014-11-17

Applicant: Applied Materials, Inc.

Inventor： Samer BANNA ,  Vladimir KNYAZIK ,  Kyle TANTIWONG

IPC: H05H1/24 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H05H1/24 ,  H01J37/321 ,  H01J37/32174 ,  H01J37/32642 ,  H01J37/32697 ,  H01L21/6875

Abstract: Embodiments of the present disclosure provide apparatus and methods for improving plasma uniformity around edge regions and/or reducing non-symmetry in a plasma processing chamber. One embodiment of the present disclosure provides a plasma tuning assembly having one or more conductive bodies disposed around an edge region of a substrate support in a plasma processing chamber. The one or more conductive bodies are isolated from other chamber components and electrically floating in the processing chamber near the edge region without connecting to active electrical potentials. During operation, when a plasma is maintained in the plasma processing chamber, the presence of the one or more conductive bodies affects the plasma distribution near the one or more conductive bodies.

Abstract translation: 本公开的实施例提供了用于改善边缘区域周围的等离子体均匀性和/或降低等离子体处理室中的非对称性的装置和方法。 本公开的一个实施例提供了等离子体调谐组件，其具有设置在等离子体处理室中的衬底支撑件的边缘区域周围的一个或多个导电体。 一个或多个导电体与其它腔室部件隔离，并且在边缘区域附近电处理室中浮动，而不会连接到有源电位。 在操作期间，当在等离子体处理室中维持等离子体时，一个或多个导电体的存在影响一个或多个导电体附近的等离子体分布。

公开(公告)号：US20220125656A1

公开(公告)日：2022-04-28

申请号：US17496242

申请日：2021-10-07

Applicant: APPLIED MATERIALS, INC.

Inventor： Samer BANNA ,  Mukhles SOWWAN ,  Mendy ERAD

IPC: A61G10/00 ,  G16H10/40 ,  G16H40/63 ,  A61G10/02 ,  B01L1/04

Abstract: Methods and apparatus for producing a treatment dose of engineered cells for individual patients at the point-of-care location. In some embodiments, a patient treatment system includes a mobile cell and gene processing station that provides individualized patient treatments at point-of-care locations. The cell and gene processing station may include a patient chamber configured to isolate a patient from an external environment, a first environment controller to adjust environmental parameters of the patient chamber, a processing chamber configured to isolate processing of patient cells from the external environment, a second environment controller to adjust environmental parameters of the processing chamber, a first apparatus configured to receive at least one blood sample from the patient, a second apparatus configured to process the blood sample, and a third apparatus configured to perform cell and gene engineering on the blood sample to create a treatment dose for the patient.

公开(公告)号：US20210090852A1

公开(公告)日：2021-03-25

申请号：US16580325

申请日：2019-09-24

Applicant: Applied Materials, Inc.

Inventor： Ofer YULI ,  Samer BANNA

IPC: H01J37/22 ,  H01J37/28

Abstract: A semiconductor device is scanned by an electron beam of a scanning electron microscope (SEM). The area includes a three-dimensional (3D) feature having a top opening and a sidewall. The 3D feature is imaged while varying an energy value of the electron beam. The electron beam impinges at a first point within a selected area of the semiconductor device and interacts with the sidewall, wherein the first point is at a distance away from an edge of the top opening. Based on change in a signal representing secondary electron yield at the edge as the energy value of the electron beam is varied during the SEM imaging, it is determined whether the sidewall is occluded from a line-of-sight of the electron beam. A slope of the sidewall may be determined by comparing measured signals with simulated waveforms corresponding to various slopes.

公开(公告)号：US20210018449A1

公开(公告)日：2021-01-21

申请号：US17062231

申请日：2020-10-02

Applicant: Applied Materials, Inc.

Inventor： Todd EGAN ,  Mehdi VAEZ-IRAVANI ,  Samer BANNA ,  Kyle TANTIWONG ,  Gregory KIRK ,  Abraham RAVID ,  Yaoming SHEN

IPC: G01N21/95 ,  H01L21/67 ,  G01N15/02 ,  G01N15/14 ,  G01N21/94

Abstract: A system for processing a substrate is provided. The system includes a process chamber including one or more sidewalls enclosing a processing region; and a substrate support. The system further includes a passageway connected to the process chamber; and a first particle detector disposed at a first location along the passageway. The first particle detector includes an energy source configured to emit a first beam; one or more optical devices configured to direct the first beam along one or more paths, where the one or more paths extend through at least a portion of the passageway. The first particle detector further includes a first energy detector disposed at a location other than on the one or more paths. The system further includes a controller configured to communicate with the first particle detector, wherein the controller is configured to identify a fault based on signals received from the first particle detector.

公开(公告)号：US20170271181A1

公开(公告)日：2017-09-21

申请号：US15584767

申请日：2017-05-02

Applicant: Applied Materials, Inc.

Inventor： Gary E. DICKERSON ,  Seng (victor) Keong LIM ,  Samer BANNA ,  Gregory KIRK ,  Mehdi VAEZ-IRAVANI

IPC: H01L21/67 ,  H01L21/324

CPC classification number: H01L21/67248 ,  H01L21/0273 ,  H01L21/324 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/67253 ,  H01L21/6831 ,  H01L22/12

Abstract: Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC) device to various forms of radiation during one or more operations found within the IC formation processing sequence by controlling the environment surrounding and temperature of an IC device during one or more parts of the IC formation processing sequence. The provided energy may include the delivery of radiation to a surface of a formed or a partially formed IC device during a deposition, etching, inspection or post-processing process operation. In some embodiments of the disclosure, the temperature of the substrate on which the IC device is formed is controlled to a temperature that is below room temperature (e.g.,

公开(公告)号：US20160276227A1

公开(公告)日：2016-09-22

申请号：US15075094

申请日：2016-03-18

Applicant: Applied Materials, Inc.

Inventor： Gary E. DICKERSON ,  Seng (victor) Keong LIM ,  Samer BANNA ,  Gregory KIRK ,  Mehdi VAEZ-IRAVANI

IPC: H01L21/66 ,  H01L21/683 ,  H01L21/67 ,  H01L21/324 ,  H01L21/027

CPC classification number: H01L21/67248 ,  H01L21/0273 ,  H01L21/324 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/67253 ,  H01L21/6831 ,  H01L22/12

Abstract: Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC) device to various forms of radiation during one or more operations found within the IC formation processing sequence by controlling the environment surrounding and temperature of an IC device during one or more parts of the IC formation processing sequence. The provided energy may include the delivery of radiation to a surface of a formed or a partially formed IC device during a deposition, etching, inspection or post-processing process operation. In some embodiments of the disclosure, the temperature of the substrate on which the IC device is formed is controlled to a temperature that is below room temperature (e.g.,

Abstract translation: 本公开的实施例涉及一种用于在通过控制周围环境的IC形成处理序列期间发现的一个或多个操作期间减少将集成电路（IC）装置的部分暴露于各种形式的辐射的不良影响的装置和方法 以及在IC形成处理序列的一个或多个部分期间的IC器件的温度。 提供的能量可以包括在沉积，蚀刻，检查或后处理过程操作期间将辐射传送到形成的或部分形成的IC器件的表面。 在本公开的一些实施例中，将IC器件形成的衬底的温度控制在IC形成处理序列的一个或多个部分期间低于室温（例如，<20℃）的温度 。

公开(公告)号：US20220126291A1

公开(公告)日：2022-04-28

申请号：US17505628

申请日：2021-10-20

Applicant: APPLIED MATERIALS, INC.

Inventor： Mukhles SOWWAN ,  Samer BANNA

IPC: B01L3/00 ,  G01N15/10

Abstract: Embodiments of apparatus and methods for counting cells in a liquid sample are provided herein. In some embodiments, an apparatus for counting cells in a liquid sample includes: a flow-splitting chamber fluidly coupled to a collection chamber; an input tube configured to deliver a liquid sample to the flow-splitting chamber; a spaced apart array of posts along a flow path configured to redirect the liquid sample into a plurality of streams; a plurality of sensing zones corresponding to the plurality of streams; and a plurality of sensing electrodes, wherein each sensing electrode is disposed in a corresponding sensing zone of the plurality of sensing zones and configured to detect a change in electrical impedance as the liquid sample flows through the plurality of sensing zones.

公开(公告)号：US20200279066A1

公开(公告)日：2020-09-03

申请号：US16876991

申请日：2020-05-18

Applicant: Applied Materials, Inc.

Inventor： Samer BANNA ,  Dermot CANTWELL ,  Waheb BISHARA

IPC: G06F30/39 ,  G06N5/04 ,  G06N20/00

Abstract: This disclosure describes methods and systems for building a spatial model to predict performance of processing chamber, and using the spatial model to converge faster to a desired process during the process development phase. Specifically, a machine-learning engine obtains an empirical process model for a given process for a given processing chamber. The empirical process model is calibrated by using the in-line metrology data as reference. A predictive model is built by refining the empirical process model by a machine-learning engine that receives customized metrology data and outputs one or more spatial maps of the wafer for one or more dimensions of interest across the wafer without physically processing any further wafers, i.e. by performing spatial digital design of experiment (Spatial DoE).

公开(公告)号：US20200110390A1

公开(公告)日：2020-04-09

申请号：US16214550

申请日：2018-12-10

Applicant: Applied Materials, Inc.

Inventor： Samer BANNA

IPC: G05B19/418 ,  H01L21/67

Abstract: Systems and methods for controlling device performance variability during manufacturing of a device on wafers are disclosed. The system includes a process platform, on-board metrology (OBM) tools, and a first server that stores a machine-learning based process control model. The first server combines virtual metrology (VM) data and OBM data to predict a spatial distribution of one or more dimensions of interest on a wafer. The system further comprises an in-line metrology tool, such as SEM, to measure the one or more dimensions of interest on a subset of wafers sampled from each lot. A second server having a machine-learning engine receives from the first server the predicted spatial distribution of the one or more dimensions of interest based on VM and OBM, and also receives SEM metrology data, and updates the process control model periodically (e.g., to account for chamber-to-chamber variability) using machine learning techniques.