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    High voltage dielectrically isolated dual gate solid-state switch
    1.
    发明授权
    High voltage dielectrically isolated dual gate solid-state switch 失效
    高压介质隔离双栅极固态开关

    公开(公告)号：US4602268A

    公开(公告)日：1986-07-22

    申请号：US333762

    申请日：1981-12-23

    申请人： Adrian R. Hartman ,  Alfred U. MacRae ,  Peter W. Shackle

    发明人： Adrian R. Hartman ,  Alfred U. MacRae ,  Peter W. Shackle

    IPC分类号： H01L21/762 ,  H01L29/739 ,  H01L29/74

    CPC分类号： H01L29/7392 ,  H01L21/76297

    摘要： A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body having a major surface and being separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body and having a portion which is common with the major surface, an n+ type cathode region located at the other end and having a portion which is common with the major surface, and an n+ type gate region having a portion which is common with the major surface and in one embodiment being located essentially between the anode and cathode regions and in another embodiment being located other than directly between the anode and cathode regions. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. An n+ type semiconductor layer is sandwiched between the semiconductor body and the dielectric layer. Separate low resistance electrical contacts are made to the anode, cathode, and gate regions and to the substrate. The switch is capable of switching from an "ON" and conducting state to an "OFF" (blocking) state by adjusting the potential of the gate region and without having to adjust the potential of the anode or cathode regions.

    摘要翻译： 提供双向阻塞的高压固态开关由具有主表面的第一p型半导体本体组成，并通过介电层与支撑构件（半导体衬底）分离，其中p +型阳极区域位于一个 并且具有与主表面共同的部分，位于另一端的具有与主表面共有的部分的n +型阴极区域和具有一部分的n +型栅极区域 与主表面相同，并且在一个实施例中基本上位于阳极和阴极区域之间，并且在另一个实施例中，其不同于直接位于阳极区域和阴极区域之间。 比半导体主体高的杂质浓度的第二p型区域包围阴极区域。 n +型半导体层夹在半导体本体和电介质层之间。 对阳极，阴极和栅极区域以及衬底进行单独的低电阻电接触。 该开关能够通过调节栅极区域的电位而不必调整阳极或阴极区域的电位，从“导通”和导通状态切换到“关闭”（阻塞）状态。

    Dielectrically-isolated integrated circuit complementary transistors for high voltage use
    2.
    发明授权
    Dielectrically-isolated integrated circuit complementary transistors for high voltage use 失效
    用于高压使用的绝缘隔离集成电路互补晶体管

    公开(公告)号：US4232328A

    公开(公告)日：1980-11-04

    申请号：US971632

    申请日：1978-12-20

    申请人： Adrian R. Hartman ,  Terence J. Riley ,  Peter W. Shackle

    发明人： Adrian R. Hartman ,  Terence J. Riley ,  Peter W. Shackle

    IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/8228 ,  H01L27/06 ,  H01L27/082 ,  H01L27/04

    CPC分类号： H01L21/76297 ,  H01L27/0826

    摘要： Integrated circuit complementary transistors for high voltage switching applications are fabricated in separate dielectrically-isolated pockets (12), (14) of high resistivity silicon, supported in a conductive medium (11) such as polycrystalline silicon, using surface adjacent conductivity type zones constituting emitter (19), (23), base (16), (20) and collector zones (17), (21). In one embodiment using high resistivity (75-300 ohm cm) silicon, referred to as .pi. material, for the material of the pocket, one transistor is a PN.pi.P device, and the other is an NP.pi.N. In the PN.pi.P the reverse-biased base-collector pn junction is the interface between the N base zone (16) and the .pi. portion (12) of the collector zone. In the NP.pi.N transistor the base-collector junction is the interface between the lightly doped .pi. extension (14) of the base zone (20) and the N collector zone (21). A connection (32) is provided to the conductive substrate to enable application of a suitable potential thereto.

    摘要翻译： 用于高电压开关应用的集成电路互补晶体管在高电阻率硅的独立的介电隔离的凹穴（12），（14）中制造，支撑在诸如多晶硅的导电介质（11）中，使用表面相邻导电类型区域构成发射极 （19），（23），基座（16），（20）和收集器区域（17），（21）。 在一个实施例中，使用称为pi材料的高电阻率（75-300欧姆厘米）的硅作为口袋的材料，一个晶体管是PN pi P器件，另一个是NP pi N.在PN pi P反向偏置的基极集电极pn结是N基极区（16）和收集区的π部分（12）之间的界面。 在NP p N晶体管中，基极 - 集电极结是基极区（20）的轻掺杂的π延伸部（14）与N个集电极区（21）之间的界面。 向导电基板提供连接（32）以使其能够施加合适的电位。

    High voltage solid-state switch
    4.
    发明授权
    High voltage solid-state switch 失效
    高压固态开关

    公开(公告)号：US4587656A

    公开(公告)日：1986-05-06

    申请号：US248207

    申请日：1981-03-27

    申请人： Adrian R. Hartman ,  Terence J. Riley ,  Peter W. Shackle

    发明人： Adrian R. Hartman ,  Terence J. Riley ,  Peter W. Shackle

    IPC分类号： H01L21/762 ,  H01L29/72 ,  H01L29/739

    CPC分类号： H01L21/76297 ,  H01L29/72 ,  H01L29/7392

    摘要： A high voltage solid-state switch, which provides bidirectional blocking, consists of a first n type semiconductor body separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body, an n+ type cathode region located at the other end, and an n+ type gate region located between the anode and cathode regions. A second p type region of lower impurity concentration than the anode region surrounds the cathode region so as to separate it from the bulk portion of the semiconductor body. Separate low resistance electrical contacts are made to the anode, cathode, and gate regions and to the substrate. The switch is capable of switching from an "ON" and conducting state to an "OFF" (blocking) state by adjusting the potential of the gate region and without having to adjust the potential of the anode or cathode regions.

    摘要翻译： 提供双向阻塞的高压固态开关由通过介电层与位于半导体本体的一端的p +型阳极区分隔开的支撑构件（半导体衬底）分离的第一n型半导体主体， 位于另一端的n +型阴极区域和位于阳极区域和阴极区域之间的n +型栅极区域。 比阳极区域低的杂质浓度的第二p型区域围绕阴极区域，以将其与半导体本体的本体部分分离。 对阳极，阴极和栅极区域以及衬底进行单独的低电阻电接触。 该开关能够通过调节栅极区域的电位而不必调整阳极或阴极区域的电位，从“导通”和导通状态切换到“关闭”（阻塞）状态。

    High voltage monolithic transistor circuit
    6.
    发明授权
    High voltage monolithic transistor circuit 失效
    高压单片晶体管电路

    公开(公告)号：US4167748A

    公开(公告)日：1979-09-11

    申请号：US921229

    申请日：1978-07-03

    申请人： Robert S. D'Angelo ,  Adrian R. Hartman ,  Peter W. Shackle

    发明人： Robert S. D'Angelo ,  Adrian R. Hartman ,  Peter W. Shackle

    IPC分类号： H01L27/07 ,  H01L27/082 ,  H01L27/02

    CPC分类号： H01L27/0825 ,  H01L27/0772

    摘要： Disclosed is a monolithic transistor circuit for high voltage applications. A high impedance bleed resistor is effectively provided across the emitter-base junction of one of the transistors. This is accomplished by placing the base regions of this and another transistor at a selected distance apart so that the zero bias depletion regions of the bases overlap to produce a punch through condition resulting in a desired current density therebetween when an external bias is supplied. The devices thus produced have a high current carrying capacity with low leakage currents.

    摘要翻译： 公开了用于高电压应用的单片晶体管电路。 在一个晶体管的发射极 - 基极结两端有效地提供高阻抗放电电阻。 这通过将该晶体管和另一晶体管的基极区域放置在选定的距离处来实现，使得基极的零偏压耗尽区域重叠以产生穿通条件，从而在提供外部偏压时产生期望的电流密度。 这样产生的器件具有高的载流能力和低的漏电流。

    High voltage junction solid-state switch
    8.
    发明授权
    High voltage junction solid-state switch 失效
    高压接点固态开关

    公开(公告)号：US4586073A

    公开(公告)日：1986-04-29

    申请号：US248205

    申请日：1981-03-27

    申请人： Adrian R. Hartman ,  Bernard T. Murphy ,  Terence J. Riley ,  Peter W. Shackle

    发明人： Adrian R. Hartman ,  Bernard T. Murphy ,  Terence J. Riley ,  Peter W. Shackle

    IPC分类号： H01L21/761 ,  H01L27/08 ,  H01L29/739 ,  H01L29/74 ,  H01L29/78

    CPC分类号： H01L29/74 ,  H01L21/761 ,  H01L27/0817 ,  H01L29/7392

    摘要： A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body on an n type semiconductor substrate. A p+ type anode region and an n+ type cathode region exist in portions of the semiconductor body. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. The anode region and second p type region are separated from each other by a portion of the semiconductor body. The semiconductor substrate, which acts as a gate, has an electrode connected thereto. Separate electrodes are connected to the anode and cathode regions.

    摘要翻译： 提供双向阻塞的高压固态开关由n型半导体衬底上的第一p型半导体本体构成。 在半导体本体的部分存在p +型阳极区域和n +型阴极区域。 比半导体主体高的杂质浓度的第二p型区域包围阴极区域。 阳极区域和第二p型区域通过半导体主体的一部分彼此分离。 作为栅极的半导体衬底具有与其连接的电极。 单独的电极连接到阳极和阴极区域。

    Control circuitry using a pull-down transistor for high voltage solid-state switches
    9.
    发明授权
    Control circuitry using a pull-down transistor for high voltage solid-state switches 失效
    使用高压固态开关的下拉晶体管的控制电路

    公开(公告)号：US4349751A

    公开(公告)日：1982-09-14

    申请号：US120282

    申请日：1980-02-11

    申请人： Adrian R. Hartman ,  Peter W. Shackle

    发明人： Adrian R. Hartman ,  Peter W. Shackle

    IPC分类号： H03K17/567 ,  H03K17/60

    CPC分类号： H03K17/567

    摘要： To switch a first gated diode switch (GDS1) to the "OFF" state requires a voltage applied to the gate which is more positive than that of the anode or cathode and a sourcing of current into the gate of substantially the same order of magnitude as flows between the anode and cathode of the first switch. Control circuitry, which uses a second gated diode switch (GDSC) coupled by the cathode to the gate of the first switch (GDS1), is used to control the state of the first switch (GDS1). The control circuitry comprises a first branch circuit coupled to the gate of GDSC and to a first potential source +V1 and a second branch circuit coupled to the anode of GDSC and to a second potential source V2. The first branch circuit is connected to the gate of the second switch (GDSC) and controls the state thereof. The second branch circuit helps switch the first switch to the OFF state by providing a single current pulse or a plurality of current pulses into the gate of the first switch.

    摘要翻译： 要将第一门控二极管开关（GDS1）切换到“OFF”状态，需要施加到栅极的电压，该电压比阳极或阴极的正电压更大，并且电流进入栅极的电流基本上与数量级大致相同 在第一开关的阳极和阴极之间流动。 使用由阴极耦合到第一开关（GDS1）的栅极的第二门控二极管开关（GDSC）的控制电路来控制第一开关（GDS1）的状态。 控制电路包括耦合到GDSC的栅极的第一分支电路和耦合到GDSC的阳极和第二电位源V2的第一电位源+ V1和第二支路。 第一分支电路连接到第二开关（GDSC）的栅极并控制其状态。 第二分支电路通过向第一开关的栅极提供单个电流脉冲或多个电流脉冲来帮助将第一开关切换到OFF状态。