Amine-free deposition of metal-nitride films
    1.
    发明申请
    Amine-free deposition of metal-nitride films 有权
    无氮化物沉积金属氮化物膜

    公开(公告)号:US20070075427A1

    公开(公告)日:2007-04-05

    申请号:US11240005

    申请日:2005-09-30

    IPC分类号: H01L29/40 H01L21/44

    摘要: A method for forming a metal carbide layer begins with providing a substrate, an organometallic precursor material, at least one doping agent such as nitrogen, and a plasma such as a hydrogen plasma. The substrate is placed within a reaction chamber; and heated. A process cycle is then performed, where the process cycle includes pulsing the organometallic precursor material into the reaction chamber, pulsing the doping agent into the reaction chamber, and pulsing the plasma into the reaction chamber, such that the organometallic precursor material, the doping agent, and the plasma react at the surface of the substrate to form a metal carbide layer. The process cycles can be repeated and varied to form a graded metal carbide layer.

    摘要翻译: 形成金属碳化物层的方法开始于提供衬底,有机金属前体材料,至少一种掺杂剂如氮气,以及诸如氢等离子体的等离子体。 将基板放置在反应室内; 并加热。 然后进行处理循环,其中工艺循环包括将有机金属前体材料脉冲到反应室中,将掺杂剂脉冲到反应室中,并将等离子体脉冲到反应室中,使得有机金属前体材料,掺杂剂 并且等离子体在基板表面反应形成金属碳化物层。 可以重复和改变工艺循环以形成渐变的金属碳化物层。

    Direct tailoring of the composition and density of ALD films
    6.
    发明申请
    Direct tailoring of the composition and density of ALD films 失效
    直接定制ALD膜的组成和密度

    公开(公告)号:US20070099420A1

    公开(公告)日:2007-05-03

    申请号:US11266131

    申请日:2005-11-02

    IPC分类号: H01L21/44

    摘要: A method comprising introducing an organometallic precursor according to a first set of conditions in the presence of a substrate; introducing the organometallic precursor according to a different second set of conditions in the presence of the substrate; and forming a layer comprising a moiety of the organometallic precursor on the substrate according to an atomic layer deposition process. A system comprising a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board, the microprocessor comprising a substrate having a plurality of circuit devices with electrical connections made to the plurality of circuit devices through interconnect structures formed in a plurality of dielectric layers formed on the substrate and each of the plurality of interconnect structures separated from the plurality of dielectric layers by a barrier layer formed according to an atomic layer deposition process.

    摘要翻译: 一种方法,包括在底物存在下根据第一组条件引入有机金属前体; 在基材存在下根据不同的第二组条件引入有机金属前体; 并且根据原子层沉积工艺在基底上形成包含有机金属前体的部分的层。 一种包括计算设备的系统,包括微处理器,所述微处理器耦合到印刷电路板,所述微处理器包括具有多个电路器件的衬底,所述电路器件具有通过形成在多个电介质层中的互连结构而形成于所述多个电路器件的电连接 形成在所述基板上,并且所述多个互连结构中的每一个通过根据原子层沉积工艺形成的阻挡层与所述多个电介质层分离。

    Carbon nanotube interconnect structures
    7.
    发明申请
    Carbon nanotube interconnect structures 有权
    碳纳米管互连结构

    公开(公告)号:US20070155158A1

    公开(公告)日:2007-07-05

    申请号:US11325774

    申请日:2005-12-30

    IPC分类号: H01L21/4763

    摘要: A method including forming an interconnect of single-walled carbon nanotubes on a sacrificial substrate; transferring the interconnect from the sacrificial substrate to a circuit substrate; and coupling the interconnect to a contact point on the circuit substrate. A method including forming a nanotube bundle on a circuit substrate between a first contact point and a second contact point, the nanotube defining a lumen therethrough; filling a portion of a length of the lumen of the nanotube bundle with an electrically conductive material; and coupling the electrically conductive material to the second contact point. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board, the microprocessor including a substrate having a plurality of circuit devices with electrical connections made to the plurality of circuit devices through interconnect structures including carbon nanotube bundles.

    摘要翻译: 一种包括在牺牲衬底上形成单层碳纳米管的互连的方法; 将所述互连件从所述牺牲衬底转移到电路衬底; 以及将所述互连件耦合到所述电路基板上的接触点。 一种方法,包括在第一接触点和第二接触点之间的电路基板上形成纳米管束,所述纳米管限定通过其的腔; 用导电材料填充纳米管束管腔长度的一部分; 以及将所述导电材料耦合到所述第二接触点。 一种包括计算设备的系统,包括微处理器,微处理器耦合到印刷电路板,微处理器包括具有多个电路器件的衬底,该电路器件具有通过包括碳纳米管束的互连结构与多个电路器件形成的电连接。

    Carbon nanotube interconnect contacts
    8.
    发明申请
    Carbon nanotube interconnect contacts 审中-公开
    碳纳米管互连触点

    公开(公告)号:US20060281306A1

    公开(公告)日:2006-12-14

    申请号:US11148614

    申请日:2005-06-08

    IPC分类号: H01L21/44

    摘要: A method for forming an interconnect on a semiconductor substrate comprises providing at least one carbon nanotube within a trench, etching at least one portion of the carbon nanotube to create an opening, conformally depositing a metal layer on the carbon nanotube through the opening, and forming a metallized contact at the opening that is substantially coupled to the carbon nanotube. The metal layer may be conformally deposited on the carbon nanotube using an atomic layer deposition process or an electroless plating process. Multiple metal layers may be deposited to substantially fill voids within the carbon nanotube. The electroless plating process may use a supercritical liquid as the medium for the plating solution. The wetting behavior of the carbon nanotube may be modified prior to the electroless plating process to increase the hydrophilicity of the carbon nanotube.

    摘要翻译: 一种用于在半导体衬底上形成互连的方法包括在沟槽内提供至少一个碳纳米管,蚀刻碳纳米管的至少一部分以形成开口,通过开口在碳纳米管上共形沉积金属层,并形成 在开口处的金属化接触基本上与碳纳米管耦合。 可以使用原子层沉积工艺或无电镀工艺将金属层共形沉积在碳纳米管上。 可以沉积多个金属层以基本上填充碳纳米管内的空隙。 化学镀处理可以使用超临界液体作为电镀溶液的介质。 可以在化学镀处理之前改变碳纳米管的润湿性能,以增加碳纳米管的亲水性。

    Copper alloy layer for integrated circuit interconnects
    9.
    发明申请
    Copper alloy layer for integrated circuit interconnects 审中-公开
    铜合金层用于集成电路互连

    公开(公告)号:US20070264816A1

    公开(公告)日:2007-11-15

    申请号:US11434450

    申请日:2006-05-12

    IPC分类号: H01L21/4763

    摘要: A method for forming a metal interconnect comprises providing a dielectric layer on a substrate within a reaction chamber where the dielectric layer includes a trench, conformally depositing a barrier layer on the dielectric layer within the trench, conformally depositing a Cu—Al alloy layer on the barrier layer within the trench, depositing a copper layer to fill the trench, and planarizing the copper layer to form the metal interconnect. The Cu—Al alloy layer may be formed by sequential ALD or CVD deposition of an aluminum layer and a copper layer followed by an annealing process. Alternately, the Cu—Al alloy layer may be formed in-situ by co-pulsing the aluminum and copper precursors.

    摘要翻译: 一种用于形成金属互连的方法包括在反应室内的衬底上提供电介质层,其中电介质层包括沟槽,在沟槽内的电介质层上共形沉积阻挡层,在其上共形沉积Cu-Al合金层 阻挡层,沉积铜层以填充沟槽,以及平坦化铜层以形成金属互连。 Cu-Al合金层可以通过铝层和铜层的连续ALD或CVD沉积,然后进行退火工艺来形成。 或者,可以通过共同脉冲铝和铜前体原位形成Cu-Al合金层。

    Noble metal precursors for copper barrier and seed layer
    10.
    发明申请
    Noble metal precursors for copper barrier and seed layer 审中-公开
    铜屏障和种子层的贵金属前体

    公开(公告)号:US20070207611A1

    公开(公告)日:2007-09-06

    申请号:US11367160

    申请日:2006-03-03

    IPC分类号: H01L21/44

    摘要: A copper interconnect oh a semiconductor substrate comprises a dielectric layer having a trench, a noble metal layer on the dielectric layer within the trench, and a copper interconnect on the noble metal layer. The noble metal layer has a thickness that is between 3 Å and 100 Å and a density that is greater than or equal to 5 g/cm3. The copper interconnect may be formed by etching a trench into the dielectric layer, pulsing a noble metal containing precursor proximate to the semiconductor substrate, and pulsing a reactive gas proximate to the semiconductor substrate, wherein the reactive gas reacts with the precursor to form a noble metal layer on the dielectric layer. A copper layer may then be deposited atop the noble metal layer and planarized. The noble metal layer functions as a barrier to copper diffusion and provides a surface upon which the copper metal can nucleate.

    摘要翻译: 半导体衬底的铜互连包括具有沟槽的电介质层,沟槽内介电层上的贵金属层和贵金属层上的铜互连。 贵金属层的厚度在3埃至100埃之间,密度大于或等于5克/平方厘米。 铜互连可以通过将沟槽蚀刻到电介质层中,使靠近半导体衬底的含贵金属的前体脉冲,并且使靠近半导体衬底的反应性气体脉冲,其中反应气体与前体反应形成贵金属 电介质层上的金属层。 然后可以将铜层沉积在贵金属层上方并平坦化。 贵金属层用作铜扩散的阻挡层,并提供铜金属可以在其上成核的表面。