公开(公告)号：US11798907B2

公开(公告)日：2023-10-24

申请号：US17092195

申请日：2020-11-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Sheng Lin ,  Yun-Ching Hung ,  An-Hsuan Hsu ,  Chung-Hung Lai

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/10145 ,  H01L2224/1357 ,  H01L2224/13541 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/8102 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81232

Abstract: A semiconductor package includes a first substrate, a first flow channel and a second flow channel. The first flow channel is on the first substrate. The second flow channel is on the first substrate and in fluid communication with the first flow channel. The second flow channel is spaced from an inlet and an outlet of the first flow channel. The first flow channel and the second flow channel constitute a bonding region of the first substrate.

公开(公告)号：US12113044B2

公开(公告)日：2024-10-08

申请号：US17676094

申请日：2022-02-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shan-Bo Wang ,  Chin-Li Kao ,  An-Hsuan Hsu

IPC: H01L23/00 ,  H01L25/10 ,  H01L23/498

CPC classification number: H01L24/81 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L25/105 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L2224/05147 ,  H01L2224/11849 ,  H01L2224/13105 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13605 ,  H01L2224/13611 ,  H01L2224/13647 ,  H01L2224/14505 ,  H01L2224/16157 ,  H01L2224/16167 ,  H01L2224/16506 ,  H01L2224/17505 ,  H01L2224/81097 ,  H01L2224/81211 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/81935 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a package component having a first mounting surface and a second mounting surface; and a first electronic component having a first conductive pad signal communicatively mounted on the first mounting surface through a first type connector; wherein the first type connector comprises a first solder composition having a lower melting point layer sandwiched between a pair of higher melting point layers, wherein the lower melting point layer is composed of alloys capable of forming a room temperature eutectic.

公开(公告)号：US12057670B2

公开(公告)日：2024-08-06

申请号：US17219613

申请日：2021-03-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： An-Hsuan Hsu ,  Yung-Sheng Lin

IPC: H01R4/62 ,  H01R12/52 ,  H01R12/57 ,  H01R43/02 ,  H05K3/36 ,  H05K3/10

CPC classification number: H01R4/625 ,  H01R12/52 ,  H01R12/57 ,  H01R43/02 ,  H05K3/368 ,  H05K3/108 ,  H05K2203/0723

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first substrate, a second substrate, and a solid solution layer. The first substrate includes a first metal layer, and the first metal layer includes a first metal. The second substrate includes a second metal layer. The solid solution layer electrically connects the first metal layer to the second metal layer. The solid solution layer includes a first metal-rich layer.