公开(公告)号：US20240297134A1

公开(公告)日：2024-09-05

申请号：US18593660

申请日：2024-03-01

申请人： Skyworks Solutions, Inc.

发明人： Suresh Babu Yeruva ,  Dae Keun Park ,  Chien Jen Wang ,  Ki Wook Lee

IPC分类号： H01L23/00 ,  H01L25/10

CPC分类号： H01L24/10 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L24/81 ,  H01L2224/10175 ,  H01L2224/1607 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81815 ,  H01L2924/3841

摘要： An electronic package and method of manufacture are provided. The electronic package has a substrate panel, an electronic module mounted to a surface of the substrate panel, and a plurality of electrically conductive contact pads arranged on the surface of the substrate panel. The electronic module includes a group of electrically conductive nodes. A predetermined one of the plurality of electrically conductive contact pads is associated with the group of electrically conductive nodes. The group of electrically conductive nodes is coupled to a corresponding group of spatially distinct fusion areas of the predetermined electrically conductive contact pad by corresponding intermediate solder portions. A solder masking arrangement extends over a part of the surface of the substrate panel. The masking arrangement is arranged over the predetermined electrically conductive contact pad and configured to at least partially define the group of spatially distinct fusion areas.

公开(公告)号：US20230268259A1

公开(公告)日：2023-08-24

申请号：US17677042

申请日：2022-02-22

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Yiqi Tang ,  Guangxu Li ,  Rajen Manicon Murugan

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L23/49822 ,  H01L23/3107 ,  H01L24/16 ,  H01L21/4857 ,  H01L21/56 ,  H01L24/81 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/16227 ,  H01L2224/81007 ,  H01L2224/32227 ,  H01L2224/8385

摘要： An electronic device with a multilevel package substrate having multiple levels including a first level having conductive leads and a final level having conductive landing areas along a side, as well as a die mounted to the multilevel package substrate and having conductive terminals electrically coupled to respective ones of the conductive leads, and a package structure that encloses the die and a portion of the multilevel package substrate, where the multilevel package substrate has a conductive elevated trace layer with a confinement feature that extends outward from the side of the final level along a third direction that is orthogonal to the first and second directions, the confinement feature having a sidewall configured to laterally confine one of a solder, an adhesive, a side of a passive component, and a side of the die.

公开(公告)号：US20180350767A1

公开(公告)日：2018-12-06

申请号：US16054009

申请日：2018-08-03

申请人： Intel Corporation

发明人： Jonathon R. Carstens ,  Michael S. Brazel ,  Russell S. Aoki ,  Laura S. Mortimer

IPC分类号： H01L23/00 ,  B23K1/00 ,  B23K1/008 ,  B23K1/19 ,  B23K1/20 ,  B23K3/06 ,  B23K3/08 ,  H01L23/34 ,  H01L23/498 ,  B23K101/42 ,  H05K3/12 ,  H05K3/34

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/19 ,  B23K1/206 ,  B23K3/06 ,  B23K3/0638 ,  B23K3/082 ,  B23K2101/42 ,  H01L23/345 ,  H01L23/49816 ,  H01L24/75 ,  H01L2224/81007 ,  H01L2224/81024 ,  H01L2224/81035 ,  H01L2224/81234 ,  H01L2224/81815 ,  H01L2924/15321 ,  H05K3/1225 ,  H05K3/3436 ,  H05K2201/10378 ,  H05K2203/166

摘要： Reflow Grid Array (RGA) technology may be implemented on an interposer device, where the interposer is placed between a motherboard and a ball grid array (BGA) package. The interposer may provide a controlled heat source to reflow solder between the interposer and the BGA package. A technical problem faced by an interposer using RGA technology is application of solder to the RGA interposer. Technical solutions described herein provide processes and equipment for application of solder and formation of solder balls to connect an RGA interposer to a BGA package.

公开(公告)号：US10083940B2

公开(公告)日：2018-09-25

申请号：US15622166

申请日：2017-06-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Der-Chyang Yeh

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L25/065 ,  H01L23/36 ,  H01L23/373 ,  H01L23/498 ,  H01L23/58 ,  H01L25/03 ,  H01L25/00 ,  H01L21/683 ,  H01L23/31 ,  H01L23/34

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/34 ,  H01L23/36 ,  H01L23/3737 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/585 ,  H01L24/19 ,  H01L24/29 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/26125 ,  H01L2224/26145 ,  H01L2224/26155 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/325 ,  H01L2224/33505 ,  H01L2224/33519 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/81007 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2224/19 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： Some embodiments relate to a semiconductor device. The semiconductor device includes a substrate. A first die is coupled beneath a lower surface of the substrate. A second die is coupled beneath the lower surface of the substrate and is disposed over the first die. A thermal contact pad is arranged beneath a lower surface of the second die and an upper surface of the first die. The thermal contact pad thermally isolates the first die from the second die.

公开(公告)号：US20180197826A1

公开(公告)日：2018-07-12

申请号：US15911765

申请日：2018-03-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Wei Wu ,  Ying-Ching Shih ,  Szu-Wei Lu ,  Jing-Cheng Lin

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/48

CPC分类号： H01L23/562 ,  H01L23/145 ,  H01L23/147 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/10135 ,  H01L2224/11464 ,  H01L2224/13012 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13664 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81139 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/37001 ,  H01L2924/014 ,  H01L2924/00012

摘要： Some embodiments of the present disclosure relate to an integrated circuit. The integrated circuit has a first semiconductor die and a second semiconductor die. The first semiconductor die is bonded to the second semiconductor die by one or more bonding structures. A first plurality of support structures are disposed between the first semiconductor die and the second semiconductor die. The first plurality of support structures are spaced apart from the one or more bonding structures. The first plurality of support structures are configured to hold together the first semiconductor die and the second semiconductor die.

公开(公告)号：US20180114768A1

公开(公告)日：2018-04-26

申请号：US15787609

申请日：2017-10-18

申请人： Samsung Display Co., Ltd.

发明人： Sang Hyeon SONG ,  Seung Hwa HA ,  Byoung Yong KIM ,  Jeong Ho HWANG

IPC分类号： H01L23/00 ,  H01L23/29 ,  H01L23/31

CPC分类号： H01L24/81 ,  H01L23/293 ,  H01L23/296 ,  H01L23/31 ,  H01L23/3171 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81206 ,  H01L2224/8183

摘要： Provided herein may be an electronic device. The electronic device may include a substrate provided with a plurality of connecting pads including a first metal, a semiconductor chip on an area of the substrate, facing the connecting pads, and including a base substrate including a first surface facing the substrate, and a second surface opposite the first surface, a plurality of connecting terminals on the first surface, facing the connecting pads, and including a second metal, and a non-adhesive polymer layer on the second surface, and a conductive joining layer electrically connecting, and interposed between, respective ones of the connecting pads to the connecting terminals, and including a diffusion layer in which the first metal and the second metal are mixed.

公开(公告)号：US09953966B2

公开(公告)日：2018-04-24

申请号：US14995687

申请日：2016-01-14

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chia-Chun Miao ,  Shih-Wei Liang ,  Kai-Chiang Wu ,  Yen-Ping Wang

IPC分类号： H01L23/48 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L25/50 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/11015 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/16245 ,  H01L2224/81007 ,  H01L2224/8112 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/812 ,  H01L2224/81815 ,  H01L2224/83007 ,  H01L2224/83121 ,  H01L2225/06513 ,  H01L2225/1058 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10333 ,  H01L2924/10335 ,  H01L2924/10342 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/3511 ,  H01L2924/3841 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

摘要： A semiconductor device having a semiconductor substrate is provided. The semiconductor substrate includes an integrated circuit, which includes multi-layer structured metallization and inter-metal dielectric. The integrated circuit is below a passivation, which is over a metal structure. The metal structure includes a metal pad and an under bumper metallurgy, which is over and aligned with the metal pad. The metal pad is electrically connected to the integrated circuit, and the under bumper metallurgy is configured to electrically connect to a conductive component of another semiconductor device. The integrated circuit further includes a conductive trace, which is below and aligned with the metal structure. The conductive trace is connected to a power source such that an electromagnetic field is generated at the conductive trace when an electric current from the power source passes through the conductive trace.

公开(公告)号：US20180063956A1

公开(公告)日：2018-03-01

申请号：US15581923

申请日：2017-04-28

申请人： Samsung Display Co., Ltd.

发明人： Jin Sic MIN ,  Eun Cheol SON

IPC分类号： H05K1/14 ,  H05K1/02 ,  H05K1/11 ,  H05K3/36 ,  H01L23/00

CPC分类号： H05K1/144 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81801 ,  H01L2224/83007 ,  H01L2224/83201 ,  H01L2224/92125 ,  H05K1/028 ,  H05K1/111 ,  H05K1/147 ,  H05K3/323 ,  H05K3/363 ,  H05K2201/042 ,  H05K2201/10128 ,  H05K2201/2036 ,  H05K2203/0278

摘要： A bonded assembly including: a first electronic component including a first substrate and a plurality of first electrodes disposed in a pressed area at a first height from a surface of the first substrate; a second electronic component including a second substrate and a plurality of second electrodes disposed at a second height from a surface of the second substrate, a second electrode overlapping with a corresponding first electrode to face the first electrode; a conductive bonding layer disposed between the first electrode and the second electrode overlapped with each other to bond the first electrode and the second electrode; and at least one spacer disposed between the first substrate and the second substrate to overlap the pressed area, the at least one spacer having a thickness that is greater than a value obtained by summing the first height and the second height.

公开(公告)号：US20170236797A1

公开(公告)日：2017-08-17

申请号：US15584498

申请日：2017-05-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Jie Chen

IPC分类号： H01L23/00 ,  H05K3/34 ,  H05K1/11 ,  H01L23/544 ,  H01L23/13

CPC分类号： H01L24/17 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2224/0345 ,  H01L2224/04 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05551 ,  H01L2224/05559 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16238 ,  H01L2224/1705 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/014 ,  H01L2224/05552

摘要： A package includes a first package component, a second package component over the first package component, and a solder region bonding the first package component to the second package component. At least one ball-height control stud separates the first package component and the second package component from each other, and defines a standoff distance between the first package component and the second package component.

公开(公告)号：US09728489B2

公开(公告)日：2017-08-08

申请号：US14527534

申请日：2014-10-29

申请人： Elwha LLC

发明人： William David Duncan ,  Roderick A. Hyde ,  Jordin T. Kare ,  Thomas M. McWilliams ,  Thomas Allan Weaver ,  Lowell L. Wood, Jr.

IPC分类号： H01L23/00 ,  H01L23/48 ,  H01F38/14

CPC分类号： H01L23/48 ,  H01F2038/146 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05026 ,  H01L2224/05082 ,  H01L2224/051 ,  H01L2224/05571 ,  H01L2224/05686 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/11318 ,  H01L2224/11424 ,  H01L2224/11444 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/13186 ,  H01L2224/1319 ,  H01L2224/13194 ,  H01L2224/13286 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/14164 ,  H01L2224/81007 ,  H01L2224/81101 ,  H01L2224/81141 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/8181 ,  H01L2224/819 ,  H01L2225/06531 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.