公开(公告)号：US08324671B2

公开(公告)日：2012-12-04

申请号：US12068912

申请日：2008-02-13

申请人： Aki Dote ,  Kazutoshi Izumi

发明人： Aki Dote ,  Kazutoshi Izumi

IPC分类号： H01L29/92

CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/55

摘要： A semiconductor device has a ferroelectric capacitor having a ferroelectric film, an interlayer insulating film having a first layer formed on the ferroelectric capacitor, a plug and a wiring connecting to the ferroelectric capacitor, and a dummy plug in the vicinity of the ferroelectric capacitor.

摘要翻译： 半导体器件具有铁电电容器，具有在铁电电容器上形成的第一层的层间绝缘膜，与铁电电容器连接的布线和在铁电电容器附近的虚拟插头的铁电体电容器。

公开(公告)号：US20080197391A1

公开(公告)日：2008-08-21

申请号：US12068912

申请日：2008-02-13

申请人： Aki Dote ,  Kazutoshi Izumi

发明人： Aki Dote ,  Kazutoshi Izumi

IPC分类号： H01L29/92 ,  H01L21/00

CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/55

摘要： A semiconductor device has a ferroelectric capacitor having a ferroelectric film, an interlayer insulating film having a first layer formed on the ferroelectric capacitor, a plug and a wiring connecting to the ferroelectric capacitor, and a dummy plug in the vicinity of the ferroelectric capacitor.

摘要翻译： 半导体器件具有铁电电容器，具有在铁电电容器上形成的第一层的层间绝缘膜，与铁电电容器连接的布线和在铁电电容器附近的虚拟插头的铁电体电容器。

公开(公告)号：US07518173B2

公开(公告)日：2009-04-14

申请号：US11129490

申请日：2005-05-16

申请人： Yukinobu Hikosaka ,  Mitsushi Fujiki ,  Kazutoshi Izumi ,  Naoya Sashida ,  Aki Dote

发明人： Yukinobu Hikosaka ,  Mitsushi Fujiki ,  Kazutoshi Izumi ,  Naoya Sashida ,  Aki Dote

IPC分类号： H01L29/41 ,  H01L29/43

CPC分类号： H01L27/11507 ,  H01L21/76816 ,  H01L21/76832 ,  H01L21/7687 ,  H01L27/11502 ,  H01L28/57

摘要： A semiconductor device includes: a semiconductor substrate; a MOS transistor formed in the semiconductor substrate and having an insulated gate and source/drain regions on both sides of the insulated gate; a ferroelectric capacitor formed above the semiconductor substrate and having a lower electrode, a ferroelectric layer and an upper electrode; a metal film formed on the upper electrode and having a thickness of a half of or thinner than a thickness of the upper electrode; an interlayer insulating film burying the ferroelectric capacitor and the metal film; a conductive plug formed through the interlayer insulating film, reaching the metal film and including a conductive glue film and a tungsten body; and an aluminum wiring formed on the interlayer insulating film and connected to the conductive plug. A new problem near an upper electrode contact is solved which may otherwise be caused by adopting a W plug over the F capacitor.

摘要翻译： 半导体器件包括：半导体衬底; 形成在所述半导体衬底中并且在所述绝缘栅极的两侧具有绝缘栅极和源极/漏极区域的MOS晶体管; 形成在半导体衬底上并具有下电极，铁电层和上电极的铁电电容器; 形成在上电极上并具有比上电极的厚度的一半或更薄的厚度的金属膜; 埋置铁电电容器和金属膜的层间绝缘膜; 通过层间绝缘膜形成的导电插塞，到达金属膜并且包括导电胶膜和钨体; 以及形成在层间绝缘膜上并连接到导电插塞的铝布线。 解决了上电极接触附近的新问题，否则可能是通过在F电容器上采用W插头引起的。

公开(公告)号：US20060157762A1

公开(公告)日：2006-07-20

申请号：US11129490

申请日：2005-05-16

申请人： Yukinobu Hikosaka ,  Mitsushi Fujiki ,  Kazutoshi Izumi ,  Naoya Sashida ,  Aki Dote

发明人： Yukinobu Hikosaka ,  Mitsushi Fujiki ,  Kazutoshi Izumi ,  Naoya Sashida ,  Aki Dote

IPC分类号： H01L29/94

CPC分类号： H01L27/11507 ,  H01L21/76816 ,  H01L21/76832 ,  H01L21/7687 ,  H01L27/11502 ,  H01L28/57

摘要： A semiconductor device includes: a semiconductor substrate; a MOS transistor formed in the semiconductor substrate and having an insulated gate and source/drain regions on both sides of the insulated gate; a ferroelectric capacitor formed above the semiconductor substrate and having a lower electrode, a ferroelectric layer and an upper electrode; a metal film formed on the upper electrode and having a thickness of a half of or thinner than a thickness of the upper electrode; an interlayer insulating film burying the ferroelectric capacitor and the metal film; a conductive plug formed through the interlayer insulating film, reaching the metal film and including a conductive glue film and a tungsten body; and an aluminum wiring formed on the interlayer insulating film and connected to the conductive plug. A new problem near an upper electrode contact is solved which may otherwise be caused by adopting a W plug over the F capacitor.

公开(公告)号：US20100261294A1

公开(公告)日：2010-10-14

申请号：US12543179

申请日：2009-08-18

申请人： Yasuhiro Hayashi ,  Kazutoshi Izumi

发明人： Yasuhiro Hayashi ,  Kazutoshi Izumi

IPC分类号： H01L21/02

CPC分类号： H01L27/105 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/76804 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55 ,  H01L28/57 ,  H01L28/65

摘要： After a first via hole leading to a ferroelectric capacitor structure are formed in an interlayer insulating film by dry etching, a second via hole to expose part of the ferroelectric capacitor structure is formed in a hydrogen diffusion preventing film so as to be aligned with the first via hole by wet etching, and a via hole constructed by the first via hole and the second via hole communicating with each other is formed.

摘要翻译： 在通过干蚀刻在层间绝缘膜中形成通向导电铁电电容器结构的第一通孔之后，在氢扩散防止膜中形成用于暴露部分铁电电容器结构的第二通孔，以便与第一通孔 通过湿蚀刻形成通孔，并且形成由第一通孔和第二通孔构成的通孔，彼此连通。

公开(公告)号：US07803640B2

公开(公告)日：2010-09-28

申请号：US11946467

申请日：2007-11-28

申请人： Kazutoshi Izumi

发明人： Kazutoshi Izumi

IPC分类号： H01L21/00

CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/57

摘要： The embodiments discussed herein reduce, in a semiconductor device having a ferroelectric capacitor, the film thickness of an interlayer insulation film covering the ferroelectric capacitor without degrading yield, and reduce the invasion of water into the ferroelectric capacitor. A semiconductor device includes a first interlayer insulation film formed on a substrate, a ferroelectric capacitor formed on the first interlayer insulation film, a second interlayer insulation film formed on the first interlayer insulation film so as to cover the ferroelectric capacitor, and a hydrogen barrier film formed on the second interlayer insulation film, the ferroelectric capacitor is formed of a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film in contact therewith, and a polish-resistant film formed on the upper electrode, wherein the second interlayer insulation film covers the polish-resistant film with a film thickness of 50-100 nm.

摘要翻译： 这里讨论的实施例在具有铁电电容器的半导体器件中减少覆盖铁电体电容器的层间绝缘膜的膜厚而不降低产率，并且减少水侵入铁电电容器。 半导体器件包括形成在基板上的第一层间绝缘膜，形成在第一层间绝缘膜上的铁电电容器，形成在第一层间绝缘膜上以覆盖铁电电容器的第二层间绝缘膜，以及氢阻挡膜 形成在第二层间绝缘膜上的铁电电容器由下电极，形成在下电极上的强电介质膜，形成在与其接触的铁电体膜上的上电极和形成在上电极上的耐光膜形成 其特征在于，所述第二层间绝缘膜覆盖所述耐光泽膜，膜厚为50〜100nm。

公开(公告)号：US20080121959A1

公开(公告)日：2008-05-29

申请号：US11946467

申请日：2007-11-28

申请人： Kazutoshi Izumi

发明人： Kazutoshi Izumi

IPC分类号： H01L29/94 ,  H01L21/00

CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/57

摘要： The embodiments discussed herein reduce, in a semiconductor device having a ferroelectric capacitor, the film thickness of an interlayer insulation film covering the ferroelectric capacitor without degrading yield, and reduce the invasion of water into the ferroelectric capacitor. A semiconductor device includes a first interlayer insulation film formed on a substrate, a ferroelectric capacitor formed on the first interlayer insulation film, a second interlayer insulation film formed on the first interlayer insulation film so as to cover the ferroelectric capacitor, and a hydrogen barrier film formed on the second interlayer insulation film, the ferroelectric capacitor is formed of a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film in contact therewith, and a polish-resistant film formed on the upper electrode, wherein the second interlayer insulation film covers the polish-resistant film with a film thickness of 50-100 nm.

摘要翻译： 这里讨论的实施例在具有铁电电容器的半导体器件中减少覆盖铁电体电容器的层间绝缘膜的膜厚而不降低产率，并且减少水侵入铁电电容器。 半导体器件包括形成在基板上的第一层间绝缘膜，形成在第一层间绝缘膜上的铁电电容器，形成在第一层间绝缘膜上以覆盖铁电电容器的第二层间绝缘膜，以及氢阻挡膜 形成在第二层间绝缘膜上的铁电电容器由下电极，形成在下电极上的强电介质膜，形成在与其接触的铁电体膜上的上电极和形成在上电极上的耐光膜形成 其特征在于，所述第二层间绝缘膜覆盖所述耐光泽膜，膜厚为50〜100nm。

公开(公告)号：US07364964B2

公开(公告)日：2008-04-29

申请号：US11133267

申请日：2005-05-20

申请人： Kazutoshi Izumi

发明人： Kazutoshi Izumi

IPC分类号： H01L21/8242

CPC分类号： H01L21/02197 ,  H01L21/02175 ,  H01L21/02274 ,  H01L21/31604 ,  H01L21/31691 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76837 ,  H01L27/11502 ,  H01L27/11507

摘要： A highly reliable semiconductor device having a ferroelectric capacitor structure by sufficiently preventing the H2 attack without damaging the function of an interlayer insulating film covering interconnections and the like to obtain a high capacitor performance. The position of a semiconductor substrate mounted on and secured to a substrate support plate in an HDP-CVD system is adjusted in the vertical direction, whereby a second HDP-CVD oxide film is deposited so that voids are formed between aluminum interconnections at lower positions than the height of the aluminum interconnections.

摘要翻译： 具有铁电电容器结构的高度可靠的半导体器件，通过充分防止H 2 2攻击而不损害层间绝缘膜覆盖互连等的功能，以获得高电容器性能。 在HDP-CVD系统中安装并固定到基板支撑板上的半导体基板的位置在垂直方向上被调整，由此沉积第二HDP-CVD氧化物膜，使得在较低位置的铝互连之间形成空隙， 铝互连的高度。

公开(公告)号：US07960227B2

公开(公告)日：2011-06-14

申请号：US12543179

申请日：2009-08-18

申请人： Yasuhiro Hayashi ,  Kazutoshi Izumi

发明人： Yasuhiro Hayashi ,  Kazutoshi Izumi

IPC分类号： H01L21/8242

CPC分类号： H01L27/105 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/76804 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55 ,  H01L28/57 ,  H01L28/65

摘要： After a first via hole leading to a ferroelectric capacitor structure are formed in an interlayer insulating film by dry etching, a second via hole to expose part of the ferroelectric capacitor structure is formed in a hydrogen diffusion preventing film so as to be aligned with the first via hole by wet etching, and a via hole constructed by the first via hole and the second via hole communicating with each other is formed.

摘要翻译： 在通过干蚀刻在层间绝缘膜中形成通向导电铁电电容器结构的第一通孔之后，在氢扩散防止膜中形成用于暴露部分铁电电容器结构的第二通孔，以便与第一通孔 通过湿蚀刻形成通孔，并且形成由第一通孔和第二通孔构成的通孔，彼此连通。

公开(公告)号：US20070232016A1

公开(公告)日：2007-10-04

申请号：US11495769

申请日：2006-07-31

申请人： Yasuhiro Hayashi ,  Kazutoshi Izumi

发明人： Yasuhiro Hayashi ,  Kazutoshi Izumi

IPC分类号： H01L21/20

CPC分类号： H01L27/105 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/76804 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55 ,  H01L28/57 ,  H01L28/65

摘要： After a first via hole leading to a ferroelectric capacitor structure are formed in an interlayer insulating film by dry etching, a second via hole to expose part of the ferroelectric capacitor structure is formed in a hydrogen diffusion preventing film so as to be aligned with the first via hole by wet etching, and a via hole constructed by the first via hole and the second via hole communicating with each other is formed.

摘要翻译： 在通过干蚀刻在层间绝缘膜中形成通向导电铁电电容器结构的第一通孔之后，在氢扩散防止膜中形成用于暴露部分铁电电容器结构的第二通孔，以便与第一通孔 通过湿蚀刻形成通孔，并且形成由第一通孔和第二通孔构成的通孔，彼此连通。