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    SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING FINE STRUCTURE ARRANGING SUBSTRATE, AND DISPLAY ELEMENT
    3.
    发明申请
    SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING FINE STRUCTURE ARRANGING SUBSTRATE, AND DISPLAY ELEMENT 审中-公开
    半导体元件，制造微结构基板的方法和显示元件

    公开(公告)号：US20110058126A1

    公开(公告)日：2011-03-10

    申请号：US12867725

    申请日：2009-02-10

    申请人： Yasunobu Okada ,  Akihide Shibata ,  Yoshiharu Nakajima ,  Hiroshi Iwata ,  Ai Naitou ,  Yutaka Takafuji ,  Tetsu Negishi

    发明人： Yasunobu Okada ,  Akihide Shibata ,  Yoshiharu Nakajima ,  Hiroshi Iwata ,  Ai Naitou ,  Yutaka Takafuji ,  Tetsu Negishi

    IPC分类号： G02F1/1333 ,  H01L29/41 ,  H01L21/44

    CPC分类号： H01L27/283 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/78696 ,  H01L51/0012 ,  H01L51/0545

    摘要： With reference to a direction perpendicular to a direction of forming electrodes to which a voltage can be applied, fine structures are each arranged within ±5 degrees at a substantially even interval, and a semiconductor element is formed by using the fine structures. On an insulating substrate, at least two electrodes are arranged at a predetermined interval, and there are formed one or more fine structure arranging regions, each of which is formed by a unit of the two electrodes. A semiconductor element electrode is made in contact with the plurality of the fine structures, each having two ends in contact with the two electrodes and a length in a longitudinal direction of a nano order to a micron order, and arranged within ±5 degrees with reference to the direction perpendicular to the direction of forming the electrodes.

    摘要翻译： 关于与形成可施加电压的电极的方向垂直的方向，精细结构以基本上均匀的间隔布置在±5度内，并且通过使用精细结构形成半导体元件。 在绝缘基板上，至少两个电极以预定间隔布置，并且形成一个或多个精细结构布置区域，每个电极由两个电极的单元形成。 半导体元件电极与多个精细结构接触，每个微结构具有与两个电极接触的两个端部，并且在纵向方向上的长度为纳米级至微米级，并且以参考方式布置在±5度内 到垂直于形成电极的方向的方向。

    Semiconductor device and method for manufacturing same
    4.
    发明授权
    Semiconductor device and method for manufacturing same 有权
    半导体装置及其制造方法

    公开(公告)号：US08361882B2

    公开(公告)日：2013-01-29

    申请号：US13139988

    申请日：2009-08-21

    申请人： Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Shin Matsumoto ,  Kazuo Nakagawa ,  Yutaka Takafuji

    发明人： Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Shin Matsumoto ,  Kazuo Nakagawa ,  Yutaka Takafuji

    IPC分类号： H01L21/30 ,  H01L29/06

    CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L29/66772 ,  H01L29/78636

    摘要： Provided is a semiconductor device manufacturing method wherein the following steps are performed; a step of forming at least a part of an element on a base body layer, a step of forming a peeling layer, a step of forming a planarizing film; a step of forming a die by separating the base body layer at a separating region; a step of bonding the die to a substrate by bonding the die on the planarizing film; and a step of peeling and removing a part of the base body layer along the peeling layer. Prior to the step of forming the die, a step of forming a groove opened on the surface of the planarizing film such that at least a part of the separating region is included on the bottom surface of the groove, and forming the die such that the die has a polygonal outer shape wherein all the internal angles are obtuse by forming the groove is performed.

    摘要翻译： 提供一种其中执行以下步骤的半导体器件制造方法; 在基体层上形成元素的至少一部分的步骤，形成剥离层的步骤，形成平坦化膜的步骤; 通过在分离区域分离基体层而形成模具的步骤; 通过将该模具接合在平坦化膜上而将芯片接合到基板的步骤; 以及沿剥离层剥离和去除基体层的一部分的步骤。 在成形模具的步骤之前，形成在平坦化膜的表面上开口的槽，使得至少一部分分离区域包含在槽的底面上，并且形成模具，使得 模具具有多边形外形，其中通过形成凹槽来执行所有内角都是钝的。

    Method for producing semiconductor device and semiconductor device produced by same method
    5.
    发明授权
    Method for producing semiconductor device and semiconductor device produced by same method 有权
    通过相同方法制造半导体器件和半导体器件的方法

    公开(公告)号：US08207046B2

    公开(公告)日：2012-06-26

    申请号：US12682221

    申请日：2008-10-21

    申请人： Michiko Takei ,  Shin Matsumoto ,  Yasumori Fukushima ,  Yutaka Takafuji

    发明人： Michiko Takei ,  Shin Matsumoto ,  Yasumori Fukushima ,  Yutaka Takafuji

    IPC分类号： H01L21/02

    CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

    摘要： To prevent bubbles from occurring along a transfer interface, the present method includes the steps of: forming a peeled layer 10 in a transferred member 6 by implanting a peeled-layer forming substance into the transferred member 6; forming a planar surface in the transferred member 6 by planarizing a surface of the transferred member 6; forming a composite including the transferred member 6 and a glass substrate 2 by directly combining the transferred member 6 via the planar surface with a surface of the glass substrate 2; and peeling a part of the transferred member 6 from the composite along the peeled layer 10 serving as an interface by heat-treating the composite.

    摘要翻译： 为了防止沿着转移界面发生气泡，本方法包括以下步骤：通过将剥离层形成物质注入到被转印元件6中，在转印元件6中形成剥离层10; 通过使转印部件6的表面平坦化，在被转印部件6中形成平面; 通过经由平面表面直接将转印部件6与玻璃基板2的表面直接组合，形成包括转印部件6和玻璃基板2的复合体; 以及通过热处理复合材料，沿着作为界面的剥离层10将复合材料的一部分从复合材料剥离。

    Method for fabricating semiconductor device and semiconductor device with separation along peeling layer
    9.
    发明授权
    Method for fabricating semiconductor device and semiconductor device with separation along peeling layer 有权
    半导体器件制造方法和沿着剥离层分离的半导体器件

    公开(公告)号：US08017492B2

    公开(公告)日：2011-09-13

    申请号：US12222598

    申请日：2008-08-12

    申请人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

    发明人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

    IPC分类号： H01L21/76

    CPC分类号： H01L21/84 ,  H01L21/32 ,  H01L21/76254 ,  H01L27/1203 ,  H01L29/78654

    摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

    摘要翻译： 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域， 地区。 制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。

    Methods for producing a semiconductor device having planarization films
    10.
    发明授权
    Methods for producing a semiconductor device having planarization films 有权
    具有平坦化膜的半导体器件的制造方法

    公开(公告)号：US08008205B2

    公开(公告)日：2011-08-30

    申请号：US12159582

    申请日：2006-10-13

    申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Michiko Takei ,  Kazuhide Tomiyasu

    发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Michiko Takei ,  Kazuhide Tomiyasu

    IPC分类号： H01L21/311

    CPC分类号： H01L21/84 ,  H01L21/26506 ,  H01L21/76254 ,  H01L21/823475 ,  H01L21/823481 ,  H01L27/12 ,  H01L29/6659 ,  H01L29/7833

    摘要： A method of the present invention includes a first planarization film formation step of forming, in at least part of a flat portion of the second regions, a first planarization film so as to have a uniform thickness; a second planarization film formation step of forming a second planarization film between the first planarization films to be coplanar with a surface of the first planarization film; a peeling layer formation step of forming a peeling layer by ion implantation of a peeling material into the base layer via the first planarization film or the second planarization film; and a separation step of separating part of the base layer along the peeling layer.

    摘要翻译： 本发明的方法包括：第一平坦化膜形成步骤，在第二区域的平坦部分的至少一部分中形成具有均匀厚度的第一平坦化膜; 第二平坦化膜形成步骤，在所述第一平坦化膜之间形成与所述第一平坦化膜的表面共面的第二平坦化膜; 剥离层形成步骤，通过经由第一平坦化膜或第二平坦化膜将剥离材料离子注入基底层来形成剥离层; 以及分离步骤，用于沿着剥离层分离基底层的一部分。