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    Process for preparing thermosetting prepolymer from mixture of polyfunctional maleimide and bis-maleimide
    2.
    发明授权
    Process for preparing thermosetting prepolymer from mixture of polyfunctional maleimide and bis-maleimide 失效
    由多官能马来酰亚胺和双马来酰亚胺的混合物制备热固性预聚物的方法

    公开(公告)号：US4283522A

    公开(公告)日：1981-08-11

    申请号：US71518

    申请日：1979-08-31

    申请人： Akio Takahashi ,  Yutaka Itoh ,  Motoyo Wajima ,  Hirosada Morishita ,  Kenji Tsukanishi

    发明人： Akio Takahashi ,  Yutaka Itoh ,  Motoyo Wajima ,  Hirosada Morishita ,  Kenji Tsukanishi

    IPC分类号： C08G73/12 ,  C08J5/24 ,  C08G69/26 ,  C08G73/10

    CPC分类号： C08G73/121

    摘要： A process for preparing a thermosetting maleimide type prepolymer which comprises heating (A) a polyfunctional maleimide compound derived from a polyamine prepared from aniline and formalin, (B) a bis-maleimide and (C) a diamine. The thermosetting maleimide type prepolymer prepared according to the process of the present invention is excellent in solubility in low boiling point solvents such as acetone, methyl ethyl ketone and methyl cellosolve, which are available at low cost. Accordingly, the prepolymer is advantageously used especially for the production of laminated boards having excellent heat resisting properties.

    摘要翻译： 一种制备热固性马来酰亚胺型预聚物的方法，其包括加热（A）由苯胺和福尔马林制备的多胺衍生的多官能马来酰亚胺化合物，（B）双马来酰亚胺和（C）二胺。 根据本发明的方法制备的热固性马来酰亚胺型预聚物在低沸点溶剂如丙酮，甲基乙基酮和甲基溶纤剂中的溶解性优异，可以低成本获得。 因此，预聚物有利地用于生产具有优异的耐热性能的层压板。

    Bismide-ether compounds, compositions thereof, and method of producing same
    4.
    发明授权
    Bismide-ether compounds, compositions thereof, and method of producing same 失效
    二苯醚类化合物及其组合物及其制备方法

    公开(公告)号：US4296219A

    公开(公告)日：1981-10-20

    申请号：US5233

    申请日：1979-01-22

    申请人： Akio Takahashi ,  Yutaka Itoh ,  Motoyo Wajima ,  Hirosada Morishita ,  Akio Nishikawa

    发明人： Akio Takahashi ,  Yutaka Itoh ,  Motoyo Wajima ,  Hirosada Morishita ,  Akio Nishikawa

    IPC分类号： C07D207/44 ,  C07D207/448 ,  C08G73/12

    CPC分类号： C07D207/448 ,  C08G73/121

    摘要： A bisimide-ether compound having the general formula is obtained by reacting an ethylenically unsaturated dicarboxylic acid anhydride, a diamine compound and a phenolic compound having in the molecule at least two hydroxyl groups, or by reacting a prepolymer of the anhydride and diamine compound with the phenolic compound: ##STR1## wherein R.sub.1 is a group containing at least two carbon atoms, R.sub.2 is a group containing at least two carbon atoms, R'.sub.2 is a group containing at least two carbon atoms and a carbon-carbon double bond, R.sub.3 is an aromatic group, the nitrogen atoms of the imide rings being directly connected to different carbon atoms of the group R.sub.1, the carbonyl groups of the imide rings being directly connected to different carbon atoms of the group R.sub.2 or R'.sub.2, the oxygen atoms between the groups R.sub.2 and R.sub.3 being directly connected to an aromatic nucleus of the group R.sub.3, and n is an integer of zero, one or more than 1.

    摘要翻译： 通过使烯键式不饱和二羧酸酐，二胺化合物和分子中至少两个羟基的酚类化合物反应，或者使酸酐与二胺化合物的预聚物与 酚类化合物：其中R1是含有至少两个碳原子的基团，R2是含有至少两个碳原子的基团，R'2是含有至少两个碳原子的基团和碳 - 碳双键，R3 是芳族基团，酰亚胺环的氮原子直接连接到基团R1的不同碳原子上，酰亚胺环的羰基直接连接到基团R 2或R'2的不同碳原子上，氧原子 在基团R 2和R 3直接连接到基团R 3的芳香环上，且n是0，1或1以上的整数。

    Process for producing printed circuit board by electroless plating
    6.
    发明授权
    Process for producing printed circuit board by electroless plating 失效
    通过化学镀制造印刷电路板的工艺

    公开(公告)号：US4378384A

    公开(公告)日：1983-03-29

    申请号：US297565

    申请日：1981-08-31

    申请人： Kanji Murakami ,  Mineo Kawamoto ,  Yutaka Itoh ,  Youichi Matsuda ,  Motoyo Wajima ,  Shoji Kawakubo ,  Toyofusa Yoshimura

    发明人： Kanji Murakami ,  Mineo Kawamoto ,  Yutaka Itoh ,  Youichi Matsuda ,  Motoyo Wajima ,  Shoji Kawakubo ,  Toyofusa Yoshimura

    IPC分类号： H05K3/18 ,  H05K3/38 ,  H05K3/42 ,  C23C3/02

    CPC分类号： H05K3/381 ,  H05K3/387 ,  H05K2203/0793 ,  H05K2203/122 ,  H05K3/181 ,  H05K3/184 ,  H05K3/426

    摘要： A process for producing a printed circuit board which comprises forming a plating film forming adhesive layer on the whole exposed surface of an insulating board, roughening said adhesive layer surface, depositing a catalyst for electroless copper plating on said adhesive layer surface from a catalyst solution, masking the thus treated insulating board surface excepting the part where a circuit is to be formed, and then performing the electroless copper plating on the catalyst of the board to form a circuit thereon, wherein an improvement comprises treating the roughened adhesive layer surface with an alkaline solution before depositing the catalyst thereon and treating the masked insulating board with an aqueous solution containing a surfactant before performing the electroless copper plating. The above process assures a higher copper utilization and a large adhesive strength of the copper plating to the board.

    摘要翻译： 一种制造印刷电路板的方法，包括在绝缘板的整个暴露表面上形成镀膜形成粘合剂层，使所述粘合剂层表面粗糙化，在所述粘合剂层表面上从催化剂溶液沉积无电镀铜催化剂， 掩蔽除了形成电路的部分之外的如此处理的绝缘板表面，然后在板的催化剂上进行无电镀铜以在其上形成电路，其中改进包括用碱性处理粗糙化的粘合剂层表面 在将催化剂沉积在其上并在进行化学镀铜之前用含有表面活性剂的水溶液处理掩蔽的绝缘板。 上述方法确保了铜的铜利用率和电镀铜的较大的粘合强度。

    Image forming apparatus and method of detecting contamination in the image forming apparatus
    7.
    发明授权
    Image forming apparatus and method of detecting contamination in the image forming apparatus 失效
    图像形成装置和检测图像形成装置中的污染物的方法

    公开(公告)号：US08070252B2

    公开(公告)日：2011-12-06

    申请号：US12035897

    申请日：2008-02-22

    申请人： Yutaka Itoh ,  Kazuya Tashiro

    发明人： Yutaka Itoh ,  Kazuya Tashiro

    IPC分类号： B41J29/393 ,  B41J29/38

    CPC分类号： G03G15/161 ,  G03G15/55

    摘要： An image forming apparatus includes a transport belt, a carriage, a reflection sensor, and a control unit. The transport belt transports a recording sheet in a sub-scanning direction. The carriage, mounting a recording head, reciprocally moves in a main scanning direction to record an image on the recording sheet. The reflection sensor, mounted on the carriage, receives light reflected from the transport belt to detect a leading edge of the recording sheet, and outputs a detection signal corresponding to the received light. The control unit controls a contamination check process. The control unit instructs the carriage to move to a given position over the transport belt and to drive the transport belt for one rotation while maintaining the carriage at the given position. The control unit determines whether contamination exists on the transport belt based on the detection signal output from the reflection sensor.

    摘要翻译： 图像形成装置包括传送带，托架，反射传感器和控制单元。 传送带沿副扫描方向传送记录纸。 安装记录头的托架在主扫描方向上往复运动，以将图像记录在记录纸上。 安装在托架上的反射传感器接收从传送带反射的光以检测记录纸的前缘，并输出与接收到的光对应的检测信号。 控制单元控制污染检查过程。 控制单元指示滑架移动到传送带上方的给定位置，并将传送带驱动一圈，同时将滑架保持在给定位置。 控制单元基于从反射传感器输出的检测信号确定传送带上是否存在污染物。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07888801B2

    公开(公告)日：2011-02-15

    申请号：US12430439

    申请日：2009-04-27

    申请人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    发明人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    IPC分类号： H01L23/522

    CPC分类号： H01L23/585 ,  H01L21/76832 ,  H01L23/522 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.

    摘要翻译： 一种半导体器件包括在半导体衬底上的层间绝缘膜中堆叠的至少三个或更多个布线层，设置在半导体衬底的芯片区域的外周处的密封环和在芯片区域的一部分中提供的芯片强度增强 靠近密封圈。 芯片强度加强件由多个虚拟布线结构构成，并且多个虚设布线结构中的每一个形成为跨越两个或更多个布线层中的两个或更多个布线层，包括最下面的布线层和最上面的布线层 使用通孔部分。

    Microcomputer
    9.
    发明申请
    Microcomputer 审中-公开
    微电脑

    公开(公告)号：US20070220337A1

    公开(公告)日：2007-09-20

    申请号：US11717644

    申请日：2007-03-14

    申请人： Yutaka Itoh ,  Yasuhiro Nagira

    发明人： Yutaka Itoh ,  Yasuhiro Nagira

    IPC分类号： G06F11/00

    CPC分类号： G06F11/321

    摘要： A microcomputer includes: a memory; a CPU which decodes memory data stored in the memory to execute an instruction; a debug control section for instructing the microcomputer to perform a debug operation according to an instruction from an external debug instruction device which is connected to the microcomputer; and an authentication section for performing, when the external debug instruction device is connected to the microcomputer that is in a normal operation, an authentication as to whether to allow the debug operation to be performed, wherein the memory data of the memory is prevented from being read out to outside of the microcomputer during a period between connection of the external debug instruction device to the microcomputer and success of the authentication by the authentication section.

    摘要翻译： 微型计算机包括：存储器; 对存储在存储器中的存储器数据进行解码以执行指令的CPU; 调试控制部分，用于指示微型计算机根据来自连接到微计算机的外部调试指令装置的指令执行调试操作; 以及认证部，用于当外部调试指令装置连接到正常操作的微型计算机时，执行关于是否允许执行调试操作的认证，其中防止存储器的存储器数据成为 在外部调试指令装置连接到微型计算机之间的期间和认证部分的认证成功的期间，读出到微计算机的外部。

    Semiconductor device
    10.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08237281B2

    公开(公告)日：2012-08-07

    申请号：US12984142

    申请日：2011-01-04

    申请人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    发明人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    IPC分类号： H01L23/495

    CPC分类号： H01L23/585 ,  H01L21/76832 ,  H01L23/522 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.

    摘要翻译： 一种半导体器件包括在半导体衬底上的层间绝缘膜中堆叠的至少三个或更多个布线层，设置在半导体衬底的芯片区域的外周处的密封环和在芯片区域的一部分中提供的芯片强度增强 靠近密封圈。 芯片强度加强件由多个虚拟布线结构构成，并且多个虚设布线结构中的每一个形成为跨越两个或更多个布线层中的两个或更多个布线层，包括最下面的布线层和最上面的布线层 使用通孔部分。