公开(公告)号：US08846484B2

公开(公告)日：2014-09-30

申请号：US13397414

申请日：2012-02-15

申请人： Albert Sanghyup Lee ,  Chien-Lan Hsueh ,  Tim Minvielle ,  Takeshi Yamaguchi

发明人： Albert Sanghyup Lee ,  Chien-Lan Hsueh ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC分类号： H01L45/00 ,  H01L21/20

CPC分类号： H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616

摘要： Systems and methods for preparing resistive switching memory devices such as resistive random access memory (ReRAM) devices wherein both oxide and nitride layers are deposited in a single chamber are provided. Various oxide and nitride based layers in the ReRAM device such as the switching layer, current-limiting layer, and the top electrode (and optionally the bottom electrode) are deposited in the single chamber. By fabricating the ReRAM device in a single chamber, throughput is increased and cost is decreased. Moreover, processing in a single chamber reduces device exposure to air and to particulates, thereby minimizing device defects.

摘要翻译： 提供用于制备诸如电阻式随机存取存储器（ReRAM）器件的电阻式开关存储器件的系统和方法，其中氧化物层和氮化物层都沉积在单个腔室中。 ReRAM器件中的诸如开关层，限流层和顶部电极（以及可选的底部电极）中的各种氧化物和氮化物层被沉积在单个室中。 通过在单个室中制造ReRAM器件，增加了吞吐量并降低了成本。 此外，在单个室中的处理减少了设备暴露于空气和微粒，从而使设备缺陷最小化。

公开(公告)号：US08853099B2

公开(公告)日：2014-10-07

申请号：US13328423

申请日：2011-12-16

申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC分类号： H01L21/31

CPC分类号： H01L45/145 ,  B82Y10/00 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1608

摘要： A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.

摘要翻译： 非易失性电阻存储元件具有新颖的可变电阻层，其包括金属氮化物，金属氧化物氮化物，二金属氧化物氮化物或其多层叠层。 形成新颖的可变电阻层的一种方法包括层间沉积程序，其中金属氧化物层散布有金属氮化物层，然后通过退火工艺转变成基本均匀的层。 形成新型可变电阻层的另一种方法包括层间沉积程序，其中各种ALD工艺顺序交错以形成金属氧化物 - 氮化物层。 或者，金属氧化物被沉积，氮化和退火以形成可变电阻层，或者金属氮化物被沉积，氧化和退火以形成可变电阻层。

公开(公告)号：US08466005B2

公开(公告)日：2013-06-18

申请号：US13188835

申请日：2011-07-22

申请人： Dipankar Pramanik ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

发明人： Dipankar Pramanik ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC分类号： H01L21/00 ,  H01L21/16 ,  H01L21/332

CPC分类号： H01L45/1253 ,  H01L27/101 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608

摘要： Embodiments of the invention generally relate to memory devices and methods for fabricating such memory devices. In one embodiment, a method for fabricating a resistive switching memory device includes depositing a metallic layer on a lower electrode disposed on a substrate and exposing the metallic layer to an activated oxygen source while heating the substrate to an oxidizing temperature within a range from about 300° C. to about 600° C. and forming a metal oxide layer from an upper portion of the metallic layer during an oxidation process. The lower electrode contains a silicon material and the metallic layer contains hafnium or zirconium. Subsequent to the oxidation process, the method further includes heating the substrate to an annealing temperature within a range from greater than 600° C. to about 850° C. while forming a metal silicide layer from a lower portion of the metallic layer during a silicidation process.

公开(公告)号：US08846443B2

公开(公告)日：2014-09-30

申请号：US13198837

申请日：2011-08-05

申请人： Zhendong Hong ,  Hieu Pham ,  Randall Higuchi ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

发明人： Zhendong Hong ,  Hieu Pham ,  Randall Higuchi ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC分类号： H01L21/00 ,  H01L21/8222 ,  H01L45/00 ,  H01L27/24

CPC分类号： H01L45/146 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

摘要： Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

摘要翻译： 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其包含至少一个硬金属氧化物膜（例如，金属被完全氧化或基本上被氧化 ）和至少一种软金属氧化物膜（例如，金属比硬金属氧化物氧化较少）。 由于软金属氧化物膜比硬金属氧化物膜氧化得更少或更金属，所以软金属氧化物膜的电阻小于硬金属氧化物膜。 在一个实例中，通过利用臭氧作为氧化剂的ALD工艺形成硬质金属氧化物膜，而通过利用水蒸汽作为氧化剂的另一ALD工艺形成软金属氧化物膜。

公开(公告)号：US09299926B2

公开(公告)日：2016-03-29

申请号：US13399728

申请日：2012-02-17

申请人： Mihir Tendulkar ,  Imran Hashim ,  Yun Wang ,  Tim Minvielle ,  Takeshi Yamaguchi

发明人： Mihir Tendulkar ,  Imran Hashim ,  Yun Wang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC分类号： H01L21/02 ,  H01L45/00

CPC分类号： H01L45/08 ,  G11C2213/51 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/146 ,  H01L45/16

摘要： Embodiments of the invention include a method of forming a nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, due to the addition of a current limiting component. In one embodiment, the current limiting component comprises a resistive material configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel oxide layer that is a current limiting material and an oxygen barrier layer that is an oxygen deficient material disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.

摘要翻译： 本发明的实施例包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括被配置为改善电阻式开关存储器元件的开关性能和寿命的电阻材料。 电流限制层的电气特性被配置为在逻辑状态编程步骤期间通过在非易失性存储器件中存在的电阻式开关存储器元件中增加固定串联电阻来降低通过可变电阻层的电流。 在一个实施例中，限流部件包括作为限流材料的隧道氧化物层和作为设置在非易失性电阻式开关存储器件中的电阻式开关存储器元件内的缺氧材料的氧阻挡层。

公开(公告)号：US08569104B2

公开(公告)日：2013-10-29

申请号：US13367927

申请日：2012-02-07

申请人： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

发明人： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

IPC分类号： H01L29/02

CPC分类号： H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

摘要： Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

公开(公告)号：US08552413B2

公开(公告)日：2013-10-08

申请号：US13368118

申请日：2012-02-07

申请人： Mihir Tendulkar ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

发明人： Mihir Tendulkar ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC分类号： H01L29/02

CPC分类号： H01L45/1608 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/15 ,  G11C2213/32 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616

摘要： Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises a resistive material that is configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel nitride that is a current limiting material that is disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.

摘要翻译： 本发明的实施例通常包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括被配置为改善电阻式开关存储器元件的开关性能和寿命的电阻材料。 电流限制层的电性能被配置为通过在电阻式开关存储元件中增加固定串联电阻来在逻辑状态编程步骤（即，“设置”和“复位”步骤）期间降低通过可变电阻层的电流 存在于非易失性存储器件中。 在一个实施例中，限流部件包括隧道氮化物，其是限制在非易失性电阻式开关存储器件中的电阻式开关存储器元件内的限流材料。

公开(公告)号：US11159030B2

公开(公告)日：2021-10-26

申请号：US15911308

申请日：2018-03-05

申请人： Takeshi Yamaguchi

发明人： Takeshi Yamaguchi

IPC分类号： H02J7/00 ,  H01M10/02 ,  H01M10/42 ,  H01M10/48 ,  H01M50/20 ,  H01M50/209

摘要： A battery pack includes a secondary battery, a secondary battery protecting integrated circuit configured to protect the secondary battery, at least one sensor configured to output a fault signal indicating sensing of a fault in the battery pack or an electronic apparatus including the battery pack, a detecting circuit configured to output a fault detection signal indicating a detection of the fault signal, a delay circuit configured to output a pulse delaying from the fault detection signal, and a counter configured to count a number of generating the pulse, the counter having at least N bits (N is an integer greater than 1), wherein the counter stops an operation until a count of 2(N-1).

公开(公告)号：US08842335B2

公开(公告)日：2014-09-23

申请号：US12831653

申请日：2010-07-07

申请人： Takeshi Yamaguchi

发明人： Takeshi Yamaguchi

IPC分类号： H04N1/60

CPC分类号： H04N1/6088 ,  H04N1/6097

摘要： Disclosed is an information processing apparatus including: a control section to obtain output condition information to show an output condition when a color chart is output, to obtain colorimetric data obtained by measuring the color chart, to create a color conversion profile based on the obtained colorimetric data, and to embed the output condition information in the created color conversion profile according to an order determined in advance.

摘要翻译： 公开了一种信息处理设备，包括：控制部分，用于获得输出条件信息，以便在输出彩色图表时显示输出条件，以获得通过测量色彩图得到的色度数据，以便根据获得的色度产生颜色转换曲线 数据，并且根据预先确定的顺序将输出条件信息嵌入到所创建的颜色转换简档中。

公开(公告)号：US08797614B2

公开(公告)日：2014-08-05

申请号：US13713195

申请日：2012-12-13

申请人： Takeshi Yamaguchi

发明人： Takeshi Yamaguchi

IPC分类号： H04N1/60

CPC分类号： H04N1/60 ,  H04N1/6019

摘要： Disclosed are a device, a method, and a storage medium to create a color conversion table. According to one implementation, a color conversion table creating device includes, a color material amount limiting processing section; a first color conversion processing section; a second color conversion processing section; a combining section; a color material amount limiting inverse conversion processing section; and an output value determining section. The color material amount limiting processing section performs color material amount limiting of an input value in the color conversion table. The color material limiting inverse conversion processing section performs inverse conversion of the color material amount limiting after color conversion and combining the CMYK components. The output value determining section sets the inverted CMYK color components as an output value in the color conversion table.

摘要翻译： 公开了一种用于创建颜色转换表的设备，方法和存储介质。 根据一个实施方案，一种颜色转换表创建装置包括：色材量限制处理部分; 第一颜色转换处理部; 第二颜色转换处理部; 组合部分; 色材量限制逆变换处理部; 和输出值确定部分。 颜色材料量限制处理部分对颜色转换表中的输入值进行颜色量限制。 色材限制逆变换处理部对颜色转换后的色材量限制进行逆变换，并组合CMYK成分。 输出值确定部分将反转的CMYK颜色分量设置为颜色转换表中的输出值。