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公开(公告)号：US5389836A
公开(公告)日：1995-02-14
申请号：US72276
申请日：1993-06-04
IPC分类号： H03K19/0944 , H03K19/173 , H03K19/096 , H03K19/017 , H03K19/20
CPC分类号： H03K19/09448 , H03K19/1738
摘要： Cascode voltage switch (CVS) logic circuits include a CMOS logic tree having multiple logic branches and a bipolar, branch isolation transistor. Each logic branch of the logic tree changes state between a logic "1" and a logic "0", with a state change being manifested as a charging or discharging of the logic branch. The bipolar transistor comprises a multiple-emitter bipolar transistor wherein each emitter is electrically coupled to a different logic branch of the CMOS logic tree. A precharge circuit, coupled to the logic tree via the bipolar transistor, provides charge to an output of the CVS circuit prior to operation of said logic tree. The logic branches of the logic tree are charged and discharged substantially independently of one another thereby enhancing speed of the combinatorial logic circuit. Various circuit modifications and generalizations are also discussed.
摘要翻译： 串联电压开关（CVS）逻辑电路包括具有多个逻辑支路的CMOS逻辑树和双极型支路隔离晶体管。 逻辑树的每个逻辑分支在逻辑“1”和逻辑“0”之间改变状态，状态变化表现为逻辑分支的充电或放电。 双极晶体管包括多发射极双极晶体管，其中每个发射极电耦合到CMOS逻辑树的不同逻辑分支。 通过双极晶体管耦合到逻辑树的预充电电路在所述逻辑树的操作之前向CVS电路的输出提供电荷。 逻辑树的逻辑分支基本上彼此独立地充电和放电，从而提高组合逻辑电路的速度。 还讨论了各种电路修改和概括。
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公开(公告)号：US4878209A
公开(公告)日：1989-10-31
申请号：US169544
申请日：1988-03-17
申请人： Robert W. Bassett , William R. Griffin , Susan A. Murphy , John G. Petrovick, Jr. , James R. Varner , Dennis R. Whittaker
发明人： Robert W. Bassett , William R. Griffin , Susan A. Murphy , John G. Petrovick, Jr. , James R. Varner , Dennis R. Whittaker
IPC分类号： G01R31/26 , G01R31/28 , G01R31/30 , G01R31/317 , G11C29/50
CPC分类号： G11C29/028 , G01R31/3016 , G11C29/50 , G11C29/50012 , G11C17/14
摘要： An apparatus and method for testing an access time of a macro embedded in a LSI chip. The apparatus includes a logical gate connected to the output latches of the macro, thereby controlling the access time of the macro, and a test latch for determining an on-chip delay time between a test signal for enabling the output latches and an input signal for enabling the macro. The method includes the steps of determining the on-chip delay time between the test signal and the input signal, thereby allowing the test signal to be synchronized with the input signal, supplying the synchronized test signal to the output latches for a manufacturer specified macro access time, and testing the latched output data from the macro.
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公开(公告)号：US4812688A
公开(公告)日：1989-03-14
申请号：US139551
申请日：1987-12-30
申请人： Albert M. Chu , William R. Griffin
发明人： Albert M. Chu , William R. Griffin
IPC分类号： H03H11/26 , H01L27/092 , H03K5/00 , H03K5/13 , H03K5/04 , H03K3/017 , H03K17/284 , H03K17/687
CPC分类号： H03K5/133 , H01L27/092 , H03K2005/00195 , H03K2005/00215
摘要： A signal delay circuit is provided which includes first and second circuits arranged parallel to each other, the first circuit having serially connected first and second transistors and the second circuit having a third transistor, and a fourth transistor connected from the common point between the first and second transistors to the second circuit, a signal is applied to one end of the parallelly arranged first and second circuits while the first, second and fourth transistors are turned on with the third transistor being turned off.
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公开(公告)号：US06645457B2
公开(公告)日：2003-11-11
申请号：US10274932
申请日：2002-10-21
IPC分类号： C01B1102
CPC分类号： C01B11/024 , B01J19/2415 , B01J19/26 , B01J2219/00162
摘要： A solid-state chlorine dioxide generator for generating an aqueous solution of ClO2 is formed within a block comprising an eductor for establishing a vacuum pressure and a reaction column for producing ClO2 from precursor chemicals. The eductor has a water stream flowing therethrough which establishes a vacuum pressure and draws the ClO2 from the reaction column into the water stream to form an aqueous ClO2 solution. The reaction chamber comprises a novel transition zone of increasing flow area wherein the precursor chemicals thoroughly mix resulting in conversion efficiencies of precursors into ClO2 of 95% and above.
摘要翻译： 在包括用于建立真空压力的喷射器的块体和用于从前体化学品生产ClO 2的反应塔的块中形成用于产生ClO 2水溶液的固态二氧化氯发生器。 喷射器具有流过其中的水流，其建立真空压力并将ClO 2从反应塔抽入水流中以形成ClO 2水溶液。 反应室包括增加流动面积的新型过渡区，其中前体化学品充分混合，导致前体转化率达到95％以上的ClO 2。
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公开(公告)号：US4638482A
公开(公告)日：1987-01-20
申请号：US685880
申请日：1984-12-24
CPC分类号： G06F11/0751
摘要： A system for testing a differential logic network is provided which includes a differential exclusive OR circuit having a plurality of inputs for receiving complementary signals from the differential logic network and first and second output terminals and means, e.g., a conventional exclusive OR circuit, for determining the voltage difference between the first and second output terminals to indicate the presence or absence of a fault or error in the differential logic network under test.
摘要翻译： 提供了一种用于测试差分逻辑网络的系统，其包括具有多个输入的差分异或电路，用于从差分逻辑网络和第一和第二输出端子接收互补信号，以及用于确定 第一和第二输出端子之间的电压差，以指示被测差分逻辑网络中存在或不存在故障或错误。
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公开(公告)号：US06468479B1
公开(公告)日：2002-10-22
申请号：US09637798
申请日：2000-08-11
IPC分类号： C01B1102
CPC分类号： C01B11/024 , B01J19/2415 , B01J19/26 , B01J2219/00162
摘要： A solid-state chlorine dioxide generator for generating an aqueous solution of chlorine dioxide is formed within a block and includes (a) an eductor for establishing a vacuum, and (b) a reaction column for producing chlorine dioxide from precursor chemicals. The eductor has a water stream flowing there throughwhich establishes a vacuum and draws the chlorine dioxide from the reaction column into the water stream to form aqueous chlorine dioxide. The reaction column has a transition zone of increasing flow area wherein the precursor chemicals thoroughly mix resulting in conversion efficiencies of precursors into chlorine dioxide of 95% and above.
摘要翻译： 在块内形成用于产生二氧化氯水溶液的固态二氧化氯发生器，包括（a）用于建立真空的喷射器，和（b）用于从前体化学品生产二氧化氯的反应塔。 喷射器具有流过其中的水流，通过该水流建立真空并将二氧化氯从反应塔抽入水流中以形成二氧化氯水溶液。 反应塔具有增加流动面积的过渡区域，其中前体化学品充分混合，导致前体转化率为95％以上的二氧化氯。
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公开(公告)号：US4542310A
公开(公告)日：1985-09-17
申请号：US508999
申请日：1983-06-29
IPC分类号： H03K19/0948 , H03K17/06 , H03K17/687 , H03K19/017 , H03K19/003 , H03K19/096
CPC分类号： H03K19/01721 , H03K19/01714
摘要： A CMOS driver or pull up circuit is provided which includes a pull up transistor of a given conductivity type and a precharged bootstrap capacitor which discharges fully through a second transistor having a conductivity type opposite to that of the pull up transistor to the control gate or electrode of the pull up transistor. A third transistor may be used to initiate discharge by providing power supply voltage to the control gate of the pull up transistor.
摘要翻译： 提供CMOS驱动器或上拉电路，其包括给定导电类型的上拉晶体管和预充电自举电容器，其通过具有与上拉晶体管的导通类型相反的导电类型的第二晶体管完全放电至控制栅极或电极 的上拉晶体管。 可以通过向上拉晶体管的控制栅极提供电源电压来使用第三晶体管来启动放电。
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公开(公告)号：US4591993A
公开(公告)日：1986-05-27
申请号：US554148
申请日：1983-11-21
IPC分类号： H01L21/8238 , H01L21/82 , H01L27/092 , H01L27/112 , H01L27/118 , H03K19/0948 , H03K19/173 , H03K19/094
CPC分类号： H03K19/0948 , H01L27/112
摘要： A methodology is provided for reducing an arbitrary Boolean logic expression to static CMOS circuits by the use of a general matrix of P channel devices and N channel devices which are interconnected in accordance with the terms of Boolean logic expressions derived from a truth table. More specifically, from a Boolean expression a sum-of-products expression giving the 1 binary data outputs of a truth table having a 0 input is found. This is accomplished by complementing, or barring, the literals which are a binary 1 when the output is 1 and leaving true or unbarred the literals that are a binary 0. Then each input of a given product term is applied to the control gate of a P channel device, which devices are connected in series with one end tied to a source of potential and the other end of the series circuit connected to an output terminal. Each product term is arranged in parallel with other P channel device series circuits to form one half of a complete logic matrix. Similarly, for the other half of the matrix, a sum-of-products expression giving the binary 0 outputs of a truth table having a binary 1 for an input is found. Each input of a given product term is applied to the control gate of an N channel device, which devices are connected in series with one end tied to a potential reference point, such as ground, and the other end of the series circuit is connected to the output terminal. Each product term is arranged in parallel with other N channel device series circuits.
摘要翻译： 提供了一种通过使用根据从真值表导出的布尔逻辑表达式的术语互连的P通道器件和N沟道器件的通用矩阵来将静态CMOS电路的任意布尔逻辑表达式减少的方法。 更具体地，从布尔表达式中，找到给出具有0输入的真值表的1个二进制数据输出的乘积和表达式表达式。 这是通过补充或限制当输出为1时为二进制1的文字，并将真实的或未被标记为二进制0的文字来实现的。然后，将给定产品项的每个输入应用于 P通道器件，这些器件串联连接到电位源的一端，串联电路的另一端连接到输出端子。 每个产品术语与其他P通道器件串联电路并联布置，形成完整逻辑矩阵的一半。 类似地，对于矩阵的另一半，找到给出用于输入的具有二进制1的真值表的二进制0输出的乘积和表达式。 给定产品项的每个输入被施加到N沟道器件的控制栅极，这些器件与连接到诸如地的参考点的一端串联连接，串联电路的另一端连接到 输出端子。 每个产品术语与其他N通道器件串联电路并联布置。
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公开(公告)号：US06866059B2
公开(公告)日：2005-03-15
申请号：US10464377
申请日：2003-06-18
申请人： William R. Griffin
发明人： William R. Griffin
CPC分类号： F16K1/04 , F16K51/00 , Y10T137/4259 , Y10T137/5283 , Y10T137/7876 , Y10T137/8122
摘要： An air-blow valve configured for clean-in-place capability is provided. The valve comprises a valve body defining a valve seat and internal fluid passageways. The valve further comprises valve components disposed within the valve body, including a plug, a piston, and a spring. The valve is separately operatively connected to a pressurized-air source and to a sanitizing-fluid source. In operation, the spring biases the piston, causing the plug to engage the seat, to prevent undesired fluid flow between the passageways and the connecting conduits. Alternatively, the spring biases the piston, causing the plug to disengage the seat, allowing fluid flow between the passageways and connecting conduits. Pressurized air is used to space the plug from the seat to achieve flow whenever desired, or alternatively to engage the seat to prevent fluid flow when desired. Periodic selective movement of the piston to space the plug from the seat, enables the cleaning solution to pass through the body and clean the internal passageways, the seat, and the plug, thereby rendering unnecessary disassembly of the valve and/or removal of the valve from the connecting conduits during valve cleaning.
摘要翻译： 提供了一种配置用于就地清洁能力的吹气阀。 阀包括限定阀座和内部流体通道的阀体。 阀还包括设置在阀体内的阀部件，包括塞子，活塞和弹簧。 阀门分开操作地连接到加压空气源和消毒液源。 在操作中，弹簧偏压活塞，使塞子接合座椅，以防止通道和连接导管之间不期望的流体流动。 或者，弹簧偏压活塞，导致塞子脱离座椅，允许流体在通道和连接导管之间流动。 加压空气用于将塞子从座椅中排出以在需要时实现流动，或者替代地接合座椅以防止在需要时流体流动。 定期选择性地移动活塞以将塞子从座椅中间隔开，使得清洁溶液能够穿过身体并清洁内部通道，座椅和塞子，从而不必要地拆卸阀门和/或移除阀门 在阀门清洗期间从连接导管。
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公开(公告)号：US06601603B2
公开(公告)日：2003-08-05
申请号：US09725279
申请日：2000-11-29
申请人： William R. Griffin
发明人： William R. Griffin
IPC分类号： F16K5100
CPC分类号： F16K1/04 , F16K51/00 , Y10T137/4259 , Y10T137/7876
摘要： An air-blow valve configured for clean-in-place capability is provided. The valve comprises a valve body defining a valve seat and internal fluid passageways. The valve further comprises valve components disposed within the valve body, including a plug, a piston, and a spring. The valve is separately operatively connected to a pressurized-air source and to a sanitizing-fluid source. In operation, the spring biases the piston, causing the plug to engage the seat, to prevent undesired fluid flow between the passageways and the connecting conduits. Pressurized air is used to space the plug from the seat to achieve flow whenever desired. Periodic selective movement of the piston to space the plug from the seat, enables the cleaning solution to pass through the body and clean the internal passageways, the seat, and the plug, thereby rendering unnecessary disassembly of the valve and/or removal of the valve from the connecting conduits during valve cleaning.
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