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    Noise shaping pipeline analog to digital converters
    1.
    发明授权
    Noise shaping pipeline analog to digital converters 有权

    公开(公告)号：US10536161B1

    公开(公告)日：2020-01-14

    申请号：US16154664

    申请日：2018-10-08

    申请人： Analog Devices, Inc.

    发明人： Huajun Zhang ,  Zhichao Tan

    IPC分类号： H03M1/12 ,  H03M3/00

    摘要： A pipeline ADC architecture with suitable feedback can implement noise shaping. By feeding back the residue generated by the last residue generating stage to selected locations in the pipeline ADC, the delays in a pipeline ADC can create a finite impulse response (FIR) filtered version of the quantization error. The FIR filtered quantization error is added to the signal and evaluated by the pipeline ADC, which results in spectral shaping of the quantization noise. Unlike a conventional pipeline ADC, the output of the backend stage is scaled and filtered by a noise transfer function (NTF) of the residue generating stages prior to combining the output with other outputs of the pipeline ADC. The processing of the shaped quantization noise by the backend stage results in further noise suppression.

    Method of performing analog-to-digital conversion
    3.
    发明授权
    Method of performing analog-to-digital conversion 有权

    公开(公告)号：US10404264B2

    公开(公告)日：2019-09-03

    申请号：US16040140

    申请日：2018-07-19

    申请人： Analog Devices, Inc.

    发明人： Baozhen Chen ,  Lalinda D. Fernando ,  Zhichao Tan

    IPC分类号： H03M1/46 ,  H03M1/00

    摘要： A method of performing analog-to-digital conversion using a successive approximation (SAR) analog-to-digital converter (ADC). A previous digital output is compared to a range based on the first M bits of the previous digital output. If the previous digital output is within that range, a digital-to-analog converter (DAC) of the SAR ADC is preloaded with the first M bits of the previous digital output, prior to commencing bit trials. If the previous digital output is outside of that range, an offset is applied to the first M bits of the previous digital output and the DAC is preloaded based on the M bits and the offset, prior to performing bit trials. This method reduces the possibility of the next input being outside of a further range defined by the preload.

    Method of Performing Analog-to-Digital Conversion
    4.
    发明申请
    Method of Performing Analog-to-Digital Conversion 审中-公开

    公开(公告)号：US20190081636A1

    公开(公告)日：2019-03-14

    申请号：US16040140

    申请日：2018-07-19

    申请人： Analog Devices, Inc.

    发明人： Baozhen Chen ,  Lalinda D. Fernando ,  Zhichao Tan

    IPC分类号： H03M1/46

    CPC分类号： H03M1/468 ,  H03M1/002 ,  H03M1/462

    摘要： A method of performing analog-to-digital conversion using a successive approximation (SAR) analog-to-digital converter (ADC). A previous digital output is compared to a range based on the first M bits of the previous digital output. If the previous digital output is within that range, a digital-to-analog converter (DAC) of the SAR ADC is preloaded with the first M bits of the previous digital output, prior to commencing bit trials. If the previous digital output is outside of that range, an offset is applied to the first M bits of the previous digital output and the DAC is preloaded based on the M bits and the offset, prior to performing bit trials. This method reduces the possibility of the next input being outside of a further range defined by the preload.