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1.发明授权System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) with routing model 有权使用路由模型实现晶片验收测试（“WAT”）高级过程控制（“APC”）的系统和方法公开(公告)号：US08219341B2
公开(公告)日：2012-07-10
申请号：US12411680
申请日：2009-03-26
申请人： Andy Tsen , Sunny Wu , Wang Jo Fei , Jong-I Mou
发明人： Andy Tsen , Sunny Wu , Wang Jo Fei , Jong-I Mou
IPC分类号： G06F19/00
摘要： System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing an inter-metal (“IM”) WAT on a plurality of processed wafer lots; selecting a subset of the plurality of wafer lots using a lot sampling process; and selecting a sample wafer group using the wafer lot subset, wherein IM WAT is performed on wafers of the sample wafer group to obtain IM WAT data therefore. The method further comprises estimating final WAT data for all wafers in the processed wafer lots from IM WAT data obtained for the sample wafer group and providing the estimated final WAT data to a WAT APC process for controlling processes.
摘要翻译： 描述了实现晶片验收测试（“WAT”）高级过程控制（“APC”）的系统和方法。 在一个实施例中，该方法包括在多个经处理的晶片批次上执行金属间（“IM”）WAT; 使用批次采样处理来选择所述多个晶片批次的子集; 以及使用晶片批次子集选择样品晶片组，因此在样品晶片组的晶片上执行IM WAT以获得IM WAT数据。 该方法还包括从针对样品晶片组获得的IM WAT数据估计经处理的晶片批次中的所有晶片的最终WAT数据，并将估计的最终WAT数据提供给用于控制过程的WAT APC过程。
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2.发明申请SYSTEM AND METHOD FOR IMPLEMENTING WAFER ACCEPTANCE TEST ("WAT") ADVANCED PROCESS CONTROL ("APC") WITH ROUTING MODEL 有权使用路由模型实现波形接收测试（“WAT”）高级过程控制（“APC”）的系统和方法公开(公告)号：US20100250172A1
公开(公告)日：2010-09-30
申请号：US12411680
申请日：2009-03-26
申请人： Andy Tsen , Sunny Wu , Wang Jo Fei , Jong-I Mou
发明人： Andy Tsen , Sunny Wu , Wang Jo Fei , Jong-I Mou
摘要： System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing an inter-metal (“IM”) WAT on a plurality of processed wafer lots; selecting a subset of the plurality of wafer lots using a lot sampling process; and selecting a sample wafer group using the wafer lot subset, wherein IM WAT is performed on wafers of the sample wafer group to obtain IM WAT data therefore. The method further comprises estimating final WAT data for all wafers in the processed wafer lots from IM WAT data obtained for the sample wafer group and providing the estimated final WAT data to a WAT APC process for controlling processes.
摘要翻译： 描述了实现晶片验收测试（“WAT”）高级过程控制（“APC”）的系统和方法。 在一个实施例中，该方法包括在多个经处理的晶片批次上执行金属间（“IM”）WAT; 使用批次采样处理来选择所述多个晶片批次的子集; 以及使用晶片批次子集选择样品晶片组，因此在样品晶片组的晶片上执行IM WAT以获得IM WAT数据。 该方法还包括从针对样品晶片组获得的IM WAT数据估计经处理的晶片批次中的所有晶片的最终WAT数据，并将估计的最终WAT数据提供给用于控制过程的WAT APC过程。
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公开(公告)号：US20100228370A1
公开(公告)日：2010-09-09
申请号：US12396996
申请日：2009-03-03
申请人： Andy Tsen , Chih-Wei Hsu , Ming-Yeon Hung , Ming-Yu Fan , Wang Jo Fei , Jong-I Mou
发明人： Andy Tsen , Chih-Wei Hsu , Ming-Yeon Hung , Ming-Yu Fan , Wang Jo Fei , Jong-I Mou
CPC分类号： H01L21/67276 , G05B13/044
摘要： A method of advanced process control (APC) for semiconductor fabrication is provided. The method includes providing a present wafer to be processed by a semiconductor processing tool, providing first data of previous wafers that have been processed by the semiconductor processing tool, decoupling noise from the first data to generate second data, evaluating an APC performance based on proximity of the second data to a target data, determining a control parameter based on the APC performance, and controlling the semiconductor processing tool with the control parameter to process the present wafer.
摘要翻译： 提供了一种用于半导体制造的先进工艺控制（APC）的方法。 该方法包括提供将由半导体处理工具处理的当前晶片，提供由半导体处理工具处理的先前晶片的第一数据，从第一数据解耦噪声以产生第二数据，基于接近度来评估APC性能 的第二数据提供给目标数据，基于APC性能确定控制参数，并且利用控制参数来控制半导体处理工具来处理本晶片。
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公开(公告)号：US08229588B2
公开(公告)日：2012-07-24
申请号：US12396996
申请日：2009-03-03
申请人： Andy Tsen , Chih-Wei Hsu , Ming-Yeon Hung , Ming-Yu Fan , Wang Jo Fei , Jong-I Mou
发明人： Andy Tsen , Chih-Wei Hsu , Ming-Yeon Hung , Ming-Yu Fan , Wang Jo Fei , Jong-I Mou
IPC分类号： G06F19/00
CPC分类号： H01L21/67276 , G05B13/044
摘要： A method of advanced process control (APC) for semiconductor fabrication is provided. The method includes providing a present wafer to be processed by a semiconductor processing tool, providing first data of previous wafers that have been processed by the semiconductor processing tool, decoupling noise from the first data to generate second data, evaluating an APC performance based on proximity of the second data to a target data, determining a control parameter based on the APC performance, and controlling the semiconductor processing tool with the control parameter to process the present wafer.
摘要翻译： 提供了一种用于半导体制造的先进工艺控制（APC）的方法。 该方法包括提供将由半导体处理工具处理的当前晶片，提供由半导体处理工具处理的先前晶片的第一数据，从第一数据解耦噪声以产生第二数据，基于接近度来评估APC性能 的第二数据提供给目标数据，基于APC性能确定控制参数，并且利用控制参数来控制半导体处理工具来处理本晶片。
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公开(公告)号：US08392009B2
公开(公告)日：2013-03-05
申请号：US12415366
申请日：2009-03-31
申请人： Wang Jo Fei , Andy Tsen , Ming-Yu Fan , Jill Wang , Jong-I Mou
发明人： Wang Jo Fei , Andy Tsen , Ming-Yu Fan , Jill Wang , Jong-I Mou
CPC分类号： G05B21/02 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a first plurality of semiconductor wafers; determining a sampling rate to the first plurality of semiconductor wafers based on process quality; determining sampling fields and sampling points to the first plurality of semiconductor wafers; measuring a subset of the first plurality of semiconductor wafers according to the sampling rate, the sampling fields and the sampling points; modifying a second process according to the measuring; and applying the second process to a second plurality of semiconductor wafers.
摘要翻译： 本发明提供一种半导体制造方法。 该方法包括对第一多个半导体晶片执行第一处理; 基于过程质量确定对所述第一多个半导体晶片的采样率; 确定采样场和采样点到所述第一多个半导体晶片; 根据采样率，采样场和采样点测量第一多个半导体晶片的子集; 根据测量修改第二个过程; 以及将所述第二处理应用于第二多个半导体晶片。
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公开(公告)号：US20100249974A1
公开(公告)日：2010-09-30
申请号：US12415366
申请日：2009-03-31
申请人： Wang Jo Fei , Andy Tsen , Ming-Yu Fan , Jill Wang , Jong-I Mou
发明人： Wang Jo Fei , Andy Tsen , Ming-Yu Fan , Jill Wang , Jong-I Mou
CPC分类号： G05B21/02 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a first plurality of semiconductor wafers; determining a sampling rate to the first plurality of semiconductor wafers based on process quality; determining sampling fields and sampling points to the first plurality of semiconductor wafers; measuring a subset of the first plurality of semiconductor wafers according to the sampling arte, the sampling fields and the sampling points; modifying a second process according to the measuring; and applying the second process to a second plurality of semiconductor waders.
摘要翻译： 本发明提供一种半导体制造方法。 该方法包括对第一多个半导体晶片执行第一处理; 基于过程质量确定对所述第一多个半导体晶片的采样率; 确定采样场和采样点到所述第一多个半导体晶片; 根据采样场，采样场和采样点测量第一多个半导体晶片的子集; 根据测量修改第二个过程; 以及将所述第二处理应用于第二多个半导体缓冲器。
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公开(公告)号：US20110010215A1
公开(公告)日：2011-01-13
申请号：US12499345
申请日：2009-07-08
申请人： Chun-Hsien Lin , Andy Tsen , Jui-Long Chen , Sunny Wu , Jong-I Mou , Chia-Hung Huang
发明人： Chun-Hsien Lin , Andy Tsen , Jui-Long Chen , Sunny Wu , Jong-I Mou , Chia-Hung Huang
CPC分类号： G06Q10/06 , G06Q30/0202
摘要： A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.
摘要翻译： 公开了一种用于在集成电路器件制造工艺的早期阶段提供容量比预测的方法。 该方法包括从一个或多个处理的晶片批次收集历史数据; 从一个或多个偏斜晶片批量收集测量数据; 从收集的历史数据和收集的测量数据生成估计的基线分布; 基于一个或多个指定参数和所生成的估计基线分布产生估计的性能分布; 通过对所生成的估计性能分布应用仓定义和产量退化因子估计来确定仓比预测; 根据仓比预测确定一个或多个生产目标; 以及基于所述一个或多个确定的生产目标来处理一个或多个晶圆。
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8.发明申请SYSTEM AND METHOD FOR IMPLEMENTING A WAFER ACCEPTANCE TEST ("WAT") ADVANCED PROCESS CONTROL ("APC") WITH NOVEL SAMPLING POLICY AND ARCHITECTURE 有权用新的采样政策和架构实施水轮接收测试（“WAT”）高级过程控制（“APC”）的系统和方法公开(公告)号：US20100292824A1
公开(公告)日：2010-11-18
申请号：US12465064
申请日：2009-05-13
申请人： Andy Tsen , Jo Fei Wang , Po-Feng Tsai , Ming-Yu Fan , Jill Wang , Jong-I Mou , Sunny Wu
发明人： Andy Tsen , Jo Fei Wang , Po-Feng Tsai , Ming-Yu Fan , Jill Wang , Jong-I Mou , Sunny Wu
IPC分类号： G05B13/04
CPC分类号： G05B13/048 , G05B19/41875 , Y02P90/22 , Y02P90/86
摘要： System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process.
摘要翻译： 描述了实现晶片验收测试（“WAT”）高级过程控制（“APC”）的系统和方法。 在一个实施例中，该方法包括对大量晶片的晶片的样本数进行密钥处理; 执行关键过程的关键在线测量以产生晶片的测量数据; 使用直线到WAT模型预测来自计量数据的WAT数据; 并且使用预测的WAT数据来调整用于控制调谐过程或过程APC过程的WAT APC过程。
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9.发明授权System and method for implementing a wafer acceptance test (“WAT”) advanced process control (“APC”) with novel sampling policy and architecture 有权采用新颖的采样策略和架构实现晶片验收测试（“WAT”）高级过程控制（“APC”）的系统和方法公开(公告)号：US08108060B2
公开(公告)日：2012-01-31
申请号：US12465064
申请日：2009-05-13
申请人： Andy Tsen , Jo Fei Wang , Po-Feng Tsai , Ming-Yu Fan , Jill Wang , Jong-I Mou , Sunny Wu
发明人： Andy Tsen , Jo Fei Wang , Po-Feng Tsai , Ming-Yu Fan , Jill Wang , Jong-I Mou , Sunny Wu
CPC分类号： G05B13/048 , G05B19/41875 , Y02P90/22 , Y02P90/86
摘要： System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process.
摘要翻译： 描述了实现晶片验收测试（“WAT”）高级过程控制（“APC”）的系统和方法。 在一个实施例中，该方法包括对大量晶片的晶片的样本数进行密钥处理; 执行关键过程的关键在线测量以产生晶片的测量数据; 使用直线到WAT模型预测来自计量数据的WAT数据; 并且使用预测的WAT数据来调整用于控制调谐过程或过程APC过程的WAT APC过程。
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公开(公告)号：US08082055B2
公开(公告)日：2011-12-20
申请号：US12499345
申请日：2009-07-08
申请人： Chun-Hsien Lin , Andy Tsen , Jui-Long Chen , Sunny Wu , Jong-I Mou , Chia-Hung Huang
发明人： Chun-Hsien Lin , Andy Tsen , Jui-Long Chen , Sunny Wu , Jong-I Mou , Chia-Hung Huang
IPC分类号： G06F19/00
CPC分类号： G06Q10/06 , G06Q30/0202
摘要： A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.
摘要翻译： 公开了一种用于在集成电路器件制造工艺的早期阶段提供容量比预测的方法。 该方法包括从一个或多个处理的晶片批次收集历史数据; 从一个或多个偏斜晶片批量收集测量数据; 从收集的历史数据和收集的测量数据生成估计的基线分布; 基于一个或多个指定参数和所生成的估计基线分布产生估计的性能分布; 通过对所生成的估计性能分布应用仓定义和产量退化因子估计来确定仓比预测; 根据仓比预测确定一个或多个生产目标; 以及基于所述一个或多个确定的生产目标来处理一个或多个晶圆。
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