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15 条记录 (耗时 0.018 秒)

    Method of reducing step height difference between doped regions of field oxide in an integrated circuit
    1.
    发明授权
    Method of reducing step height difference between doped regions of field oxide in an integrated circuit 有权
    降低集成电路中场氧化物的掺杂区域之间步距高差的方法

    公开(公告)号：US07659180B1

    公开(公告)日：2010-02-09

    申请号：US10927365

    申请日：2004-08-26

    申请人： Antoine Khoueir ,  Maroun Khoury ,  Andrey Zagrebelny

    发明人： Antoine Khoueir ,  Maroun Khoury ,  Andrey Zagrebelny

    IPC分类号： H01L21/76

    CPC分类号： H01L21/823878 ,  H01L21/76224 ,  H01L21/823857 ,  H01L21/823892

    摘要： In one embodiment, a method of fabricating one or more transistors in an integrated circuit includes an annealing step prior to a gate oxidation step. The annealing step may comprise a rapid thermal annealing (RTA) step performed prior to a gate oxidation pre-clean step. Among other advantages, the annealing step reduces a step height difference between P-doped and N-doped regions of a field oxide of a shallow trench isolation structure. The shallow trench isolation structure may be separating a PMOS transistor and an NMOS transistor in the integrated circuit.

    摘要翻译： 在一个实施例中，在集成电路中制造一个或多个晶体管的方法包括在栅极氧化步骤之前的退火步骤。 退火步骤可以包括在栅极氧化预清洁步骤之前执行的快速热退火（RTA）步骤。 除了其他优点之外，退火步骤降低了浅沟槽隔离结构的场氧化物的P掺杂区域和N掺杂区域之间的台阶高度差。 浅沟槽隔离结构可以分离集成电路中的PMOS晶体管和NMOS晶体管。

    Active protection device for resistive random access memory (RRAM) formation
    3.
    发明授权
    Active protection device for resistive random access memory (RRAM) formation 有权
    用于电阻随机存取存储器（RRAM）形成的主动保护装置

    公开(公告)号：US07965538B2

    公开(公告)日：2011-06-21

    申请号：US12502224

    申请日：2009-07-13

    申请人： Yongchul Ahn ,  Antoine Khoueir ,  Shuiyuan Huang ,  Peter Nicholas Manos ,  Maroun Khoury

    发明人： Yongchul Ahn ,  Antoine Khoueir ,  Shuiyuan Huang ,  Peter Nicholas Manos ,  Maroun Khoury

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0007 ,  G11C13/003 ,  G11C13/0059 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/78 ,  G11C2213/79

    摘要： Apparatus and method for providing overcurrent protection to a resistive random access memory (RRAM) cell during an RRAM formation process used to prepare the cell for normal read and write operations. In accordance with various embodiments, the RRAM cell is connected between a first control line and a second control line, and an active protection device (APD) is connected between the second control line and an electrical ground terminal. A formation current is applied through the RRAM cell, and an activation voltage is concurrently applied to the APD to maintain a maximum magnitude of the formation current below a predetermined threshold level.

    摘要翻译： 在用于准备用于正常读写操作的单元的RRAM形成过程期间，向电阻随机存取存储器（RRAM）单元提供过电流保护的装置和方法。 根据各种实施例，RRAM单元连接在第一控制线和第二控制线之间，并且主动保护装置（APD）连接在第二控制线和电接地端之间。 通过RRAM单元施加形成电流，并且将激活电压同时施加到APD以将形成电流的最大幅度维持在预定阈值水平以下。

    Active Protection Device for Resistive Random Access Memory (RRAM) Formation
    4.
    发明申请
    Active Protection Device for Resistive Random Access Memory (RRAM) Formation 有权
    用于电阻随机存取存储器（RRAM）形成的主动保护装置

    公开(公告)号：US20110007552A1

    公开(公告)日：2011-01-13

    申请号：US12502224

    申请日：2009-07-13

    申请人： Yongchul Ahn ,  Antoine Khoueir ,  Shuiyuan Huang ,  Peter Nicholas Manos ,  Maroun Khoury

    发明人： Yongchul Ahn ,  Antoine Khoueir ,  Shuiyuan Huang ,  Peter Nicholas Manos ,  Maroun Khoury

    IPC分类号： G11C11/00 ,  G11C5/14

    CPC分类号： G11C13/0007 ,  G11C13/003 ,  G11C13/0059 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/78 ,  G11C2213/79

    摘要： Apparatus and method for providing overcurrent protection to a resistive random access memory (RRAM) cell during an RRAM formation process used to prepare the cell for normal read and write operations. In accordance with various embodiments, the RRAM cell is connected between a first control line and a second control line, and an active protection device (APD) is connected between the second control line and an electrical ground terminal. A formation current is applied through the RRAM cell, and an activation voltage is concurrently applied to the APD to maintain a maximum magnitude of the formation current below a predetermined threshold level

    摘要翻译： 在用于准备用于正常读写操作的单元的RRAM形成过程期间，向电阻随机存取存储器（RRAM）单元提供过电流保护的装置和方法。 根据各种实施例，RRAM单元连接在第一控制线和第二控制线之间，并且主动保护装置（APD）连接在第二控制线和电接地端之间。 通过RRAM单元施加形成电流，并且激活电压同时施加到APD以将形成电流的最大幅度维持在预定阈值水平以下

    BIPOLAR CMOS SELECT DEVICE FOR RESISTIVE SENSE MEMORY
    8.
    发明申请
    BIPOLAR CMOS SELECT DEVICE FOR RESISTIVE SENSE MEMORY 有权
    BIPOLAR CMOS选择器件，用于电阻式感应存储器

    公开(公告)号：US20100177554A1

    公开(公告)日：2010-07-15

    申请号：US12502211

    申请日：2009-07-13

    申请人： Yong Lu ,  Hongyue Liu ,  Maroun Khoury ,  Yiran Chen

    发明人： Yong Lu ,  Hongyue Liu ,  Maroun Khoury ,  Yiran Chen

    IPC分类号： G11C11/00 ,  G11C11/14

    CPC分类号： G11C13/0004 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1675 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/004 ,  G11C2213/76

    摘要： A resistive sense memory apparatus includes a bipolar select device having a semiconductor substrate and a plurality of transistors disposed in the semiconductor substrate and forming a row or transistors. Each transistor includes an emitter contact and a collector contact. Each collector contact is electrically isolated from each other and each emitter contact is electrically isolated from each other. A gate contact extends along a channel region between the emitter contact and a collector contact. A base contact is disposed within the semiconductor substrate such that the emitter contact and a collector contact is between the gate contact and the base contact. A resistive sense memory cells is electrically coupled to each collector contact or emitter contact and a bit line.

    摘要翻译： 电阻式感测存储装置包括具有半导体衬底和设置在半导体衬底中并形成行或晶体管的多个晶体管的双极选择器件。 每个晶体管包括发射极触点和集电极触点。 每个集电极触点彼此电隔离，并且每个发射极触点彼此电隔离。 栅极触点沿发射极触点和集电极触点之间的沟道区域延伸。 基极触点设置在半导体衬底内，使得发射极触点和集电极触点位于栅极触点和基极触点之间。 电阻读出存储单元电耦合到每个集电极触点或发射极触点和位线。