公开(公告)号：US20040171272A1

公开(公告)日：2004-09-02

申请号：US10377852

申请日：2003-02-28

Applicant: Applied Materials, Inc.

Inventor： Guangxiang Jin ,  Padmapani C. Nallan ,  Chun Yan ,  Ajay Kumar

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/32136 ,  C23F4/00 ,  H01L21/76838 ,  H01L43/12

Abstract: A method of fabricating a structure having a tapered profile using a low temperature plasma etch (LTPE) process. In one embodiment, the LTPE process uses a gas comprising carbon tetrafluoride (CF4), trifluoromethane (CHF3), and nitrogen (N2) to fabricate the structure from a material layer of at least one of tantalum (Ta), tantalum nitride (TaN), and the like.

Abstract translation: 使用低温等离子体蚀刻（LTPE）工艺制造具有锥形轮廓的结构的方法。 在一个实施方案中，LTPE方法使用包含四氟化碳（CF 4），三氟甲烷（CHF 3）和氮（N 2）的气体，从钽（Ta），氮化钽（TaN） ，等等。

公开(公告)号：US20040132311A1

公开(公告)日：2004-07-08

申请号：US10338250

申请日：2003-01-06

Applicant: Applied Materials, Inc.

Inventor： Padmapani C. Nallan ,  Guangxiang Jin ,  Ajay Kumar

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/28194 ,  H01L21/31122 ,  H01L29/51 ,  H01L29/517

Abstract: A method of etching a dielectric layer having a dielectric constant that is greater than 4.0 on a semiconductor substrate using a pulsed substrate biasing technique (PSBT) that applies a plurality of processing cycles to the substrate, where each cycle comprises a period of plasma etching without substrate bias and a period of plasma etching with the substrate bias.

Abstract translation: 使用向衬底施加多个处理循环的脉冲衬底偏置技术（PSBT）在半导体衬底上蚀刻具有大于4.0的介电常数的电介质层的方法，其中每个周期包括等离子体蚀刻的周期，而没有 衬底偏压和等离子体蚀刻的周期。

公开(公告)号：US20040058517A1

公开(公告)日：2004-03-25

申请号：US10338251

申请日：2003-01-06

Applicant: Applied Materials, Inc.

Inventor： Padmapani C. Nallan ,  Ajay Kumar ,  Guangxiang Jin ,  Wei Liu

IPC: H01L021/3205 ,  H01L021/4763 ,  H01L021/302 ,  H01L021/461

CPC classification number: H01L21/31144 ,  H01L21/0273 ,  H01L21/28123 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/32139 ,  Y10S438/945

Abstract: A method of fabricating a gate structure of a field effect transistor comprising processes of forming an null-carbon mask and plasma etching a gate electrode and a gate dielectric using the null-carbon mask. In one embodiment, the gate dielectric comprises hafnium dioxide.

Abstract translation: 一种制造场效应晶体管的栅极结构的方法，包括使用α-碳掩模形成α-碳掩模和等离子体蚀刻栅电极和栅极电介质的工艺。 在一个实施例中，栅极电介质包括二氧化铪。

公开(公告)号：US20040053484A1

公开(公告)日：2004-03-18

申请号：US10245130

申请日：2002-09-16

Applicant: Applied Materials, Inc.

Inventor： Ajay Kumar ,  Padmapani C. Nallan

IPC: H01L021/3205 ,  H01L021/4763 ,  H01L021/336

CPC classification number: H01L21/31122 ,  H01L21/28114 ,  H01L21/32137 ,  H01L21/32139 ,  H01L29/66545

Abstract: A method of fabricating a gate structure of a field effect transistor, comprising forming a hard mask, etching a gate electrode, and contemporaneously forming a gate dielectric and removing the hard mask.

公开(公告)号：US20040043526A1

公开(公告)日：2004-03-04

申请号：US10231620

申请日：2002-08-29

Applicant: Applied Materials, Inc.

Inventor： Chentsau Ying ,  Xiaoyi Chen ,  Padmapani C. Nallan ,  Ajay Kumar

IPC: H01L021/00

CPC classification number: H01L21/02244 ,  B82Y25/00 ,  B82Y40/00 ,  C23F4/00 ,  H01F10/3254 ,  H01F41/308 ,  H01L21/02071 ,  H01L21/02252 ,  H01L21/31116 ,  H01L21/3165 ,  H01L21/32136 ,  H01L21/32139 ,  H01L43/12 ,  Y10S438/911

Abstract: A method of patterning a layer of magnetic material to form isolated magnetic regions. The method forms a mask on a film stack comprising a layer of magnetic material such the protected and unprotected regions are defined. The unprotected regions are oxidized to form isolated magnetic regions.

Abstract translation: 图案化磁性材料层以形成隔离的磁性区域的方法。 该方法在包括一层磁性材料的薄膜叠层上形成掩模，例如限定保护和未保护区域。 未保护的区域被氧化形成隔离的磁性区域。

公开(公告)号：US20040209476A1

公开(公告)日：2004-10-21

申请号：US10418449

申请日：2003-04-17

Applicant: Applied Materials, Inc.

Inventor： Chentsau Ying ,  Xiaoyi Chen ,  Chun Yan ,  Ajay Kumar

IPC: H01L021/302

CPC classification number: H01L21/02071 ,  B82Y25/00 ,  B82Y40/00 ,  C23F4/00 ,  H01F41/308 ,  H01L21/32136 ,  H01L43/12

Abstract: A method of etching a multi-layer magnetic stack (e.g., layers of cobalt-iron alloy (CoFe), ruthenium (Ru), platinum-manganese alloy (PtMn), and the like) of a magneto-resistive random access memory (MRAM) device is disclosed. Each layer of the multi-layer magnetic stack is etched using a process sequence including a plasma etch step followed by a plasma treatment step. The plasma treatment step uses a plasma comprising an inert gas to remove residues formed during the plasma etch step.

Abstract translation: 一种磁阻随机存取存储器（MRAM）的多层磁性堆叠（例如，钴 - 铁合金（CoFe），钌（Ru），铂 - 锰合金（PtMn）等的层） ）设备。 使用包括等离子体蚀刻步骤之后的等离子体处理步骤的处理顺序来蚀刻多层磁性堆叠的每一层。 等离子体处理步骤使用包含惰性气体的等离子体去除在等离子体蚀刻步骤期间形成的残留物。

公开(公告)号：US20040157459A1

公开(公告)日：2004-08-12

申请号：US10365008

申请日：2003-02-11

Applicant: Applied Materials, Inc.

Inventor： Chentsau Ying ,  Padmapani C. Nallan ,  Ajay Kumar

IPC: H01L021/302

CPC classification number: H01L27/11585 ,  H01L21/0337 ,  H01L21/31122 ,  H01L27/1159 ,  H01L28/55

Abstract: Method of etching a ferroelectric layer comprises etching an upper electrode and partially through a ferroelectric layer. A dielectric material is subsequently deposited upon the upper electrode and the partially etched ferroelectric layer. A second etch step completely etches through the remaining portion of the ferroelectric layer and also etches lower electrodes. A random access memory apparatus is constructed that includes a first conductive layer, a dielectric layer disposed upon the first conductive layer, a second conductive layer disposed upon the dielectric layer, where all of said layers form a stack having a sidewall. Further, the sidewall has a protective film disposed thereon and extends from the second layer down to the dielectric layer. The protective sidewall film is fabricated from a dielectric material.

Abstract translation: 蚀刻铁电体层的方法包括蚀刻上部电极并部分地通过铁电层。 随后将电介质材料沉积在上电极和部分蚀刻的铁电层上。 第二蚀刻步骤完全蚀刻穿过铁电层的剩余部分并蚀刻下电极。 构造了包括第一导电层，设置在第一导电层上的电介质层和设置在电介质层上的第二导电层的随机存取存储器装置，其中所有层形成具有侧壁的叠层。 此外，侧壁具有设置在其上的保护膜，并从第二层向下延伸到电介质层。 保护侧壁膜由介电材料制成。

公开(公告)号：US20040129361A1

公开(公告)日：2004-07-08

申请号：US10338059

申请日：2003-01-06

Applicant: Applied Materials, Inc.

Inventor： Xiaoyi Chen ,  Chentsau Ying ,  Padmapani C. Nallan ,  Ajay Kumar

IPC: B44C001/22

CPC classification number: H01L43/12

Abstract: A method of patterning a layer of magnetic material to form isolated magnetic regions. The method forms a mask on a film stack comprising a layer of magnetic material such that the protected and unprotected regions are defined. The unprotected regions are etched in a high temperature environment to form isolated magnetic regions.

Abstract translation: 图案化磁性材料层以形成隔离的磁性区域的方法。 该方法在包含磁性材料层的薄膜叠层上形成掩模，使得限定保护区和未保护区。 未受保护的区域在高温环境中被蚀刻以形成隔离的磁性区域。

公开(公告)号：US20040077178A1

公开(公告)日：2004-04-22

申请号：US10273802

申请日：2002-10-17

Applicant: Applied Materials, Inc.

Inventor： Chan-Syun Yang ,  Anisul H. Khan ,  Ajay Kumar ,  Padmapani C. Nallan

IPC: H01L021/302 ,  H01L021/461

CPC classification number: B81C1/00404 ,  H01L21/28114 ,  H01L21/28123 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/32137 ,  H01L21/32139

Abstract: A method for laterally etching a structure on a semiconductor substrate comprising depositing a protective mask that thins towards a bottom of the structure and lateral etching a wall of the structure to form a notch or to release the structure.

Abstract translation: 一种用于横向蚀刻半导体衬底上的结构的方法，包括沉积朝向所述结构的底部的保护掩模，并横向蚀刻所述结构的壁以形成凹口或释放所述结构。

公开(公告)号：US20040002223A1

公开(公告)日：2004-01-01

申请号：US10184301

申请日：2002-06-26

Applicant: Applied Materials, Inc.

Inventor： Padmapani C. Nallan ,  Ajay Kumar

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/31122 ,  H01L21/28123

Abstract: A method of etching high dielectric constant materials (a material with a dielectric constant greater than 4) using a halogen gas, reducing gas, and passivating gas chemistry. An embodiment of the method is accomplished using chlorine, carbon monoxide, and nitrogen to etch and passivate a hafnium dioxide layer.

Abstract translation: 使用卤素气体，还原气体和钝化气体化学法蚀刻高介电常数材料（介电常数大于4的材料）的方法。 使用氯气，一氧化碳和氮气来实现该方法的一个实施例，以蚀刻和钝化二氧化铪层。