公开(公告)号：US20170062469A1

公开(公告)日：2017-03-02

申请号：US15214104

申请日：2016-07-19

Applicant: Applied Materials, Inc.

Inventor： Michael Wenyoung TSIANG ,  Praket P. JHA ,  Xinhai HAN ,  Bok Hoen KIM ,  Sang Hyuk KIM ,  Myung Hun JU ,  Hyung Jin PARK ,  Ryeun Kwan KIM ,  Jin Chul SON ,  Saiprasanna GNANAVELU ,  Mayur G. KULKARNI ,  Sanjeev BALUJA ,  Majid K. SHAHREZA ,  Jason K. FOSTER

IPC: H01L27/115 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/423 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/28 ,  H01L21/324

CPC classification number: H01L27/11582 ,  C23C16/0272 ,  C23C16/402 ,  C23C16/45523 ,  C23C16/505 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02321 ,  H01L21/02337 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/3115 ,  H01L21/76801 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L29/06

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract translation: 本公开的实施例通常涉及用于形成用于3D NAND结构中的层间电介质（ILD）层的电介质膜叠层的改进方法。 在一个实施例中，该方法包括提供其上沉积有栅极叠层的衬底，其中使用第一RF功率在栅极堆叠的暴露表面上形成第一氧化物层，以及第一工艺气体，其包括TEOS气体和第一含氧气体 并且使用第二RF功率在第一氧化物层上形成第二氧化物层，以及包括硅烷气体和第二含氧气体的第二工艺气体。

公开(公告)号：US20190229128A1

公开(公告)日：2019-07-25

申请号：US16267151

申请日：2019-02-04

Applicant: Applied Materials, Inc.

Inventor： Michael Wenyoung TSIANG ,  Praket P. JHA ,  Xinhai HAN ,  Bok Hoen KIM ,  Sang Hyuk KIM ,  Myung Hun JU ,  Hyung Jin PARK ,  Ryeun Kwan KIM ,  Jin Chul SON ,  Saiprasanna GNANAVELU ,  Mayur G. KULKARNI ,  Sanjeev BALUJA ,  Majid K. SHAHREZA ,  Jason K. FOSTER

IPC: H01L27/11582 ,  C23C16/455 ,  C23C16/40 ,  H01L29/06 ,  C23C16/505 ,  C23C16/52 ,  C23C16/02 ,  H01L21/02 ,  H01L21/3115 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11548 ,  H01L21/768

CPC classification number: H01L27/11582 ,  C23C16/0272 ,  C23C16/402 ,  C23C16/45523 ,  C23C16/505 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02321 ,  H01L21/02337 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/3115 ,  H01L21/76801 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L29/06

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.