公开(公告)号：US12080725B2

公开(公告)日：2024-09-03

申请号：US18221285

申请日：2023-07-12

Applicant: Applied Materials, Inc.

Inventor： Xiangxin Rui ,  Lai Zhao ,  Jrjyan Jerry Chen ,  Soo Young Choi ,  Yujia Zhai

IPC: H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L49/02

CPC classification number: H01L27/1255 ,  H01L27/1222 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L28/55 ,  H01L29/4908 ,  H01L29/78675

Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.

公开(公告)号：US11664216B2

公开(公告)日：2023-05-30

申请号：US17182555

申请日：2021-02-23

Applicant: Applied Materials, Inc.

Inventor： Chien-Teh Kao ,  Xiangxin Rui

IPC: C23C16/455 ,  H01L21/02 ,  C23C16/44 ,  B05D1/00

CPC classification number: H01L21/0228 ,  B05D1/60 ,  C23C16/4412 ,  C23C16/45527 ,  H10N70/023

Abstract: Embodiments described herein provide a gas supply system for reducing purge time and increasing processing throughput, and an atomic layer deposition (ALD) chamber having the same. The gas supply system includes an inert gas line and a precursor supply line. The inert gas line is configured to be coupled to an inlet of the chamber separate from the precursor supply line. Therefore, the inert gas is supplied concurrently to the precursor supply line and the processing region of the chamber such that total purge time is reduced. The reduction of the total purge time due to the gas supply system increases purge efficiency and increases processing throughput. Furthermore, the gas supply system allows inert gas to be utilized as a dilution gas during flow of precursors.

公开(公告)号：US11049887B2

公开(公告)日：2021-06-29

申请号：US15889047

申请日：2018-02-05

Applicant: Applied Materials, Inc.

Inventor： Xiangxin Rui ,  Soo Young Choi ,  Shinichi Kurita ,  Yujia Zhai ,  Lai Zhao

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/786 ,  H01L29/49 ,  H01L21/02 ,  H01J37/32 ,  C23C16/40 ,  C23C16/50 ,  C23C16/455 ,  C23C16/52 ,  C23C16/56 ,  H01L21/687 ,  H01L21/67 ,  H01L27/32

Abstract: Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.

公开(公告)号：US10697062B2

公开(公告)日：2020-06-30

申请号：US16032854

申请日：2018-07-11

Applicant: Applied Materials, Inc.

Inventor： Chien-Teh Kao ,  Jeffrey A. Kho ,  Xiangxin Rui ,  Jianhua Zhou ,  Shinichi Kurita ,  Shouqian Shao ,  Guangwei Sun

IPC: C23C16/455 ,  C23C16/44

Abstract: Embodiments described herein provide a chamber having a gas flow inlet guide to uniformly deliver process gas and a gas flow outlet guide to effectively purge process gasses and reduce purge time. The chamber includes a chamber body having a process gas inlet and a process gas outlet, a lid assembly, a process gas inlet and a process gas outlet configured to be in fluid communication with a processing region in the chamber, a gas flow inlet guide disposed in the process gas inlet, and a gas flow outlet guide disposed in the process gas outlet. The gas flow inlet guide includes a flow modulator and at least two first inlet guide channels having first inlet guide channel areas that are different. The gas flow outlet guide includes at least two first outlet guide channels having first outlet guide channel areas that are different.

公开(公告)号：US11239258B2

公开(公告)日：2022-02-01

申请号：US15773640

申请日：2017-07-11

Applicant: Applied Materials, Inc.

Inventor： Xiangxin Rui ,  Lai Zhao ,  Jrjyan Jerry Chen ,  Soo Young Choi ,  Yujia Zhai

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.

公开(公告)号：US11145683B2

公开(公告)日：2021-10-12

申请号：US15648167

申请日：2017-07-12

Applicant: Applied Materials, Inc.

Inventor： Xiangxin Rui ,  Lai Zhao ,  Jrjyan Jerry Chen ,  Soo Young Choi ,  Yujia Zhai

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/49 ,  H01L29/786

Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.

公开(公告)号：US12076763B2

公开(公告)日：2024-09-03

申请号：US16007876

申请日：2018-06-13

Applicant: Applied Materials, Inc.

Inventor： Yujia Zhai ,  Lai Zhao ,  Xiangxin Rui ,  Dong-Kil Yim ,  Tae Kyung Won ,  Soo Young Choi

IPC: B08B7/00 ,  B08B9/00 ,  C23C16/44 ,  H01J37/32 ,  H01L21/02 ,  H01L21/687 ,  H01L27/12 ,  H01L29/49 ,  H01L49/02

CPC classification number: B08B7/0035 ,  B08B9/00 ,  C23C16/4405 ,  H01J37/32082 ,  H01L27/1255 ,  H01L29/4908 ,  H01J2237/335 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/68742 ,  H01L28/40

Abstract: In one implementation, a method for cleaning a processing chamber is provided. The method comprises introducing a reactive species into a processing chamber having a residual high-k dielectric material formed on one or more interior surfaces of the processing chamber. The reactive species is formed from a halogen-containing gas mixture and the one or more interior surfaces include at least one surface having a coating material formed thereon. The method further comprises reacting the residual high-k dielectric material with the reactive species to form a volatile product. The method further comprises removing the volatile product from the processing chamber. The removal rate of the residual high-k dielectric material is greater than a removal rate of the coating material. The high-k dielectric material is selected from zirconium dioxide (ZrO2) and hafnium dioxide (HfO2). The coating material includes a compound selected from alumina (Al2O3), yttrium-containing compounds, and combinations thereof.

公开(公告)号：US11894396B2

公开(公告)日：2024-02-06

申请号：US17647404

申请日：2022-01-07

Applicant: Applied Materials, Inc.

Inventor： Xiangxin Rui ,  Lai Zhao ,  Jrjyan Jerry Chen ,  Soo Young Choi ,  Yujia Zhai

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1248 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/247 ,  H01L29/66969 ,  H01L29/78693

Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.

公开(公告)号：US10655222B2

公开(公告)日：2020-05-19

申请号：US15829667

申请日：2017-12-01

Applicant: Applied Materials, Inc.

Inventor： Shinichi Kurita ,  Srikanth V. Racherla ,  Suhas Bhoski ,  Xiangxin Rui

IPC: C23C16/455 ,  C23C16/04 ,  C23C16/458 ,  C23C16/44 ,  C23C16/54

Abstract: The present disclosure relates to methods and apparatus for a thin film encapsulation (TFE). In one embodiment a process kit for use in an atomic layer deposition (ALD) chamber is disclosed and includes a dielectric window, a sealing frame, and a mask frame connected with the sealing frame, wherein the mask frame has a gas inlet channel and a gas outlet channel formed therein on opposing sides thereof.

公开(公告)号：US10158098B2

公开(公告)日：2018-12-18

申请号：US15843295

申请日：2017-12-15

Applicant: Applied Materials, Inc.

Inventor： Jrjyan Jerry Chen ,  Xiangxin Rui ,  Soo Young Choi

IPC: H01L51/52 ,  H01L21/67 ,  H01L21/677 ,  H01L21/687

Abstract: Embodiments described herein generally relate to a method and apparatus for encapsulating an OLED structure, more particularly, to a TFE structure for an OLED structure. The TFE structure includes at least one dielectric layer and at least two barrier layers, and the TFE structure is formed over the OLED structure. The at least one dielectric layer is deposited by atomic layer deposition (ALD). Having the at least one dielectric layer formed by ALD in the TFE structure improves the barrier performance of the TFE structure.