Minimizing particle contamination of semiconductor wafers during pressure evacuation by selective orientation and shielding
    1.
    发明申请
    Minimizing particle contamination of semiconductor wafers during pressure evacuation by selective orientation and shielding 审中-公开
    通过选择性取向和屏蔽,在减压期间最大限度地减少半导体晶片的颗粒污染

    公开(公告)号:US20060000553A1

    公开(公告)日:2006-01-05

    申请号:US10881140

    申请日:2004-06-30

    IPC分类号: C23F1/00

    CPC分类号: H01L21/02046

    摘要: A method including placing a wafer active side down in a chamber and reducing the pressure in the chamber. An apparatus or system including a chamber having an interior volume suitable to accommodate a semiconductor wafer and capable of maintaining a vacuum; and a support to maintain a wafer in the volume of the chamber with minimum or no contact with an active side of the wafer, wherein an amount of particles that an active side of a wafer is exposed to during a pressure change in the chamber is minimized when the wafer is loaded in the chamber in an active side down configuration.

    摘要翻译: 一种方法,包括将晶片活动侧向下放置在腔室中并降低腔室中的压力。 一种包括具有适于容纳半导体晶片并能够保持真空的内部容积的室的装置或系统; 以及用于将晶片保持在具有与晶片的有源侧最少或不接触的室的体积的支撑件,其中晶片的活性侧在室内的压力变化期间暴露的量的量被最小化 当晶片以有源侧向下配置装载在腔室中时。

    Erosion resistance of EUV source electrodes
    3.
    发明授权
    Erosion resistance of EUV source electrodes 有权
    EUV源电极的耐腐蚀性

    公开(公告)号:US07446329B2

    公开(公告)日:2008-11-04

    申请号:US10638261

    申请日:2003-08-07

    IPC分类号: H01J35/00

    CPC分类号: H05G2/003

    摘要: Erosion of material in an electrode in a plasma-produced extreme ultraviolet (EUV) light source may be reduced by treating the surface of the electrode. Grooves may be provided in the electrode surface to increase re-deposition of electrode material in the grooves. The electrode surface may be coated with a porous material to reduce erosion due to brittle destruction. The electrode surface may be coated with a pseudo-alloy to reduce erosion from surface waves caused by the plasma in molten material on the surface of the electrode.

    摘要翻译: 可以通过处理电极的表面来减少等离子体产生的极紫外(EUV)光源中的电极中的材料的侵蚀。 沟槽可以设置在电极表面中以增加沟槽中的电极材料的再沉积。 电极表面可以用多孔材料涂覆以减少由于脆性破坏引起的侵蚀。 电极表面可以涂覆有假合金,以减少由电极表面上的熔融材料中的等离子体引起的表面波的侵蚀。

    Erosion resistance of EUV source electrodes
    5.
    发明申请
    Erosion resistance of EUV source electrodes 有权
    EUV源电极的耐腐蚀性

    公开(公告)号:US20050031502A1

    公开(公告)日:2005-02-10

    申请号:US10638261

    申请日:2003-08-07

    IPC分类号: B01J19/08 H05G2/00

    CPC分类号: H05G2/003

    摘要: Erosion of material in an electrode in a plasma-produced extreme ultraviolet (EUV) light source may be reduced by treating the surface of the electrode. Grooves may be provided in the electrode surface to increase re-deposition of electrode material in the grooves. The electrode surface may be coated with a porous material to reduce erosion due to brittle destruction. The electrode surface may be coated with a pseudo-alloy to reduce erosion from surface waves caused by the plasma in molten material on the surface of the electrode.

    摘要翻译: 可以通过处理电极的表面来减少等离子体产生的极紫外(EUV)光源中的电极中的材料的侵蚀。 沟槽可以设置在电极表面中以增加沟槽中的电极材料的再沉积。 电极表面可以用多孔材料涂覆以减少由于脆性破坏引起的侵蚀。 电极表面可以涂覆有假合金,以减少由电极表面上的熔融材料中的等离子体引起的表面波的侵蚀。

    In-tool and Out-of-Tool Protection of Extreme Ultraviolet (EUV) Reticles
    6.
    发明申请
    In-tool and Out-of-Tool Protection of Extreme Ultraviolet (EUV) Reticles 审中-公开
    极端紫外线(EUV)网络的工具和工具外保护

    公开(公告)号:US20080174749A1

    公开(公告)日:2008-07-24

    申请号:US12055250

    申请日:2008-03-25

    IPC分类号: G03B27/52

    摘要: A reticle carrier for an Extreme Ultraviolet (EUV) reticle may include nested grids of electret fibers to provide active protection from contamination without a power supply. The reticle carrier may include in-line sensors for in-situ monitoring of contamination. Grids of electret fibers may also be used in an EUV pellicle.

    摘要翻译: 用于极紫外(EUV)掩模版的掩模版载体可以包括驻极体纤维的嵌套网格,以在没有电源的情况下提供主动防止污染。 标线载体可以包括用于原位监测污染物的在线传感器。 驻极体纤维网格也可用于EUV防护薄膜。

    Erosion mitigation for collector optics using electric and magnetic fields
    7.
    发明申请
    Erosion mitigation for collector optics using electric and magnetic fields 有权
    使用电场和磁场的集光器光栅的侵蚀减轻

    公开(公告)号:US20050155624A1

    公开(公告)日:2005-07-21

    申请号:US10759344

    申请日:2004-01-15

    IPC分类号: B08B6/00 G03F7/20 H01L21/027

    CPC分类号: G03F7/70916 H01L21/0273

    摘要: A magnetic and/or electric field may be generated around collector optics in an EUV lithography system to deflect debris particles from the reflective surfaces of the optics. The magnetic and/or electric field may be generated by a solenoid structure around the optics or by passing current through inner an outer shells in a nested shell arrangement.

    摘要翻译: 可以在EUV光刻系统中的收集器光学器件周围产生磁场和/或电场,以使来自光学器件的反射表面的碎屑颗粒偏转。 磁场和/或电场可以通过围绕光学器件的螺线管结构产生,或者通过将电流传递通过嵌套壳体布置中的外部外壳。

    Mechanized retractable pellicles and methods of use
    8.
    发明授权
    Mechanized retractable pellicles and methods of use 失效
    机械化可伸缩薄膜和使用方法

    公开(公告)号:US06734445B2

    公开(公告)日:2004-05-11

    申请号:US09840364

    申请日:2001-04-23

    IPC分类号: G03B2762

    CPC分类号: G03F1/64 G03F7/70983

    摘要: Apparatus and methods to protect a photomask that is used for semiconductor photolithography at wavelengths outside the visible spectrum include a pellicle that is readily retracted during exposure or to provide access to the photomask. The pellicle can be transparent at an inspection wavelength and opaque at an exposure wavelength. In various embodiments, the pellicle is slid, retracted, or pivoted relative to a base aligned with the photomask, thus uncovering the photomask. When overlying the photomask, the pellicle can be secured with magnetic elements, such as magnets or electromagnets. In another embodiment, the pellicle includes a diaphragm that can be opened or closed. Methods of using a pellicle are also described.

    摘要翻译: 用于保护在可见光谱外的波长处用于半导体光刻的光掩模的装置和方法包括在曝光期间容易缩回或提供对光掩模的访问的防护薄膜组件。 防护薄膜组件在检测波长下可以是透明的,并且在曝光波长处是不透明的。 在各种实施例中,防护薄膜组件相对于与光掩模对准的底座滑动,缩回或枢转,从而露出光掩模。 当覆盖光掩模时,防护薄膜组件可以用诸如磁体或电磁体的磁性元件固定。 在另一个实施例中,防护薄膜组件包括可打开或关闭的隔膜。 还描述了使用防护薄膜的方法。

    Defect mitigation structures for semiconductor devices
    10.
    发明授权
    Defect mitigation structures for semiconductor devices 有权
    半导体器件的缺陷缓解结构

    公开(公告)号:US09105469B2

    公开(公告)日:2015-08-11

    申请号:US13172880

    申请日:2011-06-30

    IPC分类号: H01L29/12 H01L21/02

    摘要: A method and a semiconductor device for incorporating defect mitigation structures are provided. The semiconductor device comprises a substrate, a defect mitigation structure comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer disposed over the defect mitigation structure. The defect mitigation structure is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer disposed over the substrate, a substrate intermediate layer disposed over the substrate nucleation layer, a substrate top layer disposed over the substrate intermediate layer, a device nucleation layer disposed over the substrate top layer, a device intermediate layer disposed over the device nucleation layer, and a device top layer disposed over the device intermediate layer. The substrate intermediate layer and the device intermediate layer comprise a distribution in their compositions along a thickness coordinate.

    摘要翻译: 提供了一种用于并入缺陷缓解结构的方法和半导体器件。 半导体器件包括衬底,包括掺杂或未掺杂IV族合金的层的组合以及设置在衬底上的金属或非金属氮化物的组合的缺陷缓解结构,以及设置在缺陷缓解结构上的器件活性层。 通过沉积一个或多个缺陷缓解层来制造缺陷缓解结构,所述缺陷缓解层包括设置在衬底上的衬底成核层,设置在衬底成核层上的衬底中间层,设置在衬底中间层上的衬底顶层,器件成核层 设置在衬底顶层上方,设置在器件成核层上的器件中间层,以及设置在器件中间层上方的器件顶层。 衬底中间层和器件中间层沿其厚度坐标包括其组成中的分布。