公开(公告)号：US06528858B1

公开(公告)日：2003-03-04

申请号：US10044892

申请日：2002-01-11

申请人： Bin Yu ,  Qi Xiang ,  Olov Karlsson ,  HaiHong Wang ,  Zoran Krivokapic

发明人： Bin Yu ,  Qi Xiang ,  Olov Karlsson ,  HaiHong Wang ,  Zoran Krivokapic

IPC分类号： H01L2902

CPC分类号： H01L29/513 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/76264 ,  H01L21/823857 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor wafer including an NMOS device and a PMOS device. The NMOS device is formed to have a high-K gate dielectric and the PMOS device is formed to have a standard-K gate dielectric. A method of forming the NMOS device and the PMOS device is also disclosed.

摘要翻译： 一种包括NMOS器件和PMOS器件的半导体晶片。 NMOS器件形成为具有高K栅极电介质，并且PMOS器件形成为具有标准K栅极电介质。 还公开了形成NMOS器件和PMOS器件的方法。

公开(公告)号：US20050073022A1

公开(公告)日：2005-04-07

申请号：US10642916

申请日：2003-08-18

申请人： Olov Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

发明人： Olov Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

IPC分类号： H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L29/00

CPC分类号： H01L29/7842 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78654

摘要： A shallow trench isolation region formed in a layer of semiconductor material. The shallow trench isolation region includes a trench formed in the layer of semiconductor material, the trench being defined by sidewalls and a bottom; a liner within the trench formed from a high-K material, the liner conforming to the sidewalls and bottom of the trench; and a fill section made from isolating material, and disposed within and conforming to the high-K liner. A method of forming the shallow trench isolation region is also disclosed.

摘要翻译： 形成在半导体材料层中的浅沟槽隔离区。 浅沟槽隔离区域包括形成在半导体材料层中的沟槽，沟槽由侧壁和底部限定; 由高K材料形成的沟槽内的衬垫，衬垫符合沟槽的侧壁和底部; 以及由隔离材料制成并填充并符合高K衬里的填充部分。 还公开了形成浅沟槽隔离区域的方法。

公开(公告)号：US06660578B1

公开(公告)日：2003-12-09

申请号：US10118274

申请日：2002-04-08

申请人： Olov Karlsson ,  Qi Xiang ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic

发明人： Olov Karlsson ,  Qi Xiang ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic

IPC分类号： H01L218238

CPC分类号： H01L27/1203 ,  H01L21/84

摘要： A semiconductor device, a semiconductor wafer and a method of forming a semiconductor wafer where a barrier layer is used to inhibit P-type ion-penetration into a dielectric layer made from a high-K material.

摘要翻译： 半导体器件，半导体晶片和形成半导体晶片的方法，其中阻挡层用于抑制由高K材料制成的电介质层中的P型离子渗透。

公开(公告)号：US06657276B1

公开(公告)日：2003-12-02

申请号：US10163925

申请日：2002-06-06

申请人： Olov B. Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

发明人： Olov B. Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

IPC分类号： H01L2900

CPC分类号： H01L29/7842 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78654

摘要： A shallow trench isolation region formed in a layer of semiconductor material. The shallow trench isolation region includes a trench formed in the layer of semiconductor material, the trench being defined by sidewalls and a bottom; a liner within the trench formed from a high-K material, the liner conforming to the sidewalls and bottom of the trench; and a fill section made from isolating material, and disposed within and conforming to the high-K liner. A method of forming the shallow trench isolation region is also disclosed.

摘要翻译： 形成在半导体材料层中的浅沟槽隔离区。 浅沟槽隔离区域包括形成在半导体材料层中的沟槽，沟槽由侧壁和底部限定; 由高K材料形成的沟槽内的衬垫，衬垫符合沟槽的侧壁和底部; 以及由隔离材料制成并填充并符合高K衬里的填充部分。 还公开了形成浅沟槽隔离区域的方法。

公开(公告)号：US06984569B2

公开(公告)日：2006-01-10

申请号：US10642916

申请日：2003-08-18

申请人： Olov B. Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

发明人： Olov B. Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

IPC分类号： H01L21/8224

CPC分类号： H01L29/7842 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78654

摘要： A shallow trench isolation region formed in a layer of semiconductor material. The shallow trench isolation region includes a trench formed in the layer of semiconductor material, the trench being defined by sidewalls and a bottom; a liner within the trench formed from a high-K material, the liner conforming to the sidewalls and bottom of the trench; and a fill section made from isolating material, and disposed within and conforming to the high-K liner. A method of forming the shallow trench isolation region is also disclosed.

公开(公告)号：US06657267B1

公开(公告)日：2003-12-02

申请号：US10163930

申请日：2002-06-06

申请人： Qi Xiang ,  Olov Karlsson ,  HaiHong Wang ,  Bin Yu

发明人： Qi Xiang ,  Olov Karlsson ,  HaiHong Wang ,  Bin Yu

IPC分类号： H01L2976

CPC分类号： H01L29/517 ,  H01L21/2652 ,  H01L21/28167 ,  H01L21/28194 ,  H01L29/51 ,  H01L29/511 ,  H01L29/513 ,  H01L29/518 ,  H01L29/6656 ,  H01L29/6659

摘要： A semiconductor device and method of fabrication are disclosed. The semiconductor device includes a liner composed of a high-K material. The liner has a portion separating a sidewall spacer from a gate and a portion separating the sidewall spacer from a layer of semiconductor material. The liner functions as an etch stop during formation of the sidewall spacer. The liner is removable by an etch process that has substantially no reaction with an isolation region formed in the layer of semiconductor material.

摘要翻译： 公开了半导体器件和制造方法。 半导体器件包括由高K材料构成的衬垫。 衬套具有将侧壁间隔物与栅极分离的部分和将侧壁间隔物与半导体材料层分离的部分。 衬垫在形成侧壁间隔物期间用作蚀刻停止。 衬里可以通过蚀刻工艺去除，该蚀刻工艺基本上不与半导体材料层中形成的隔离区域发生反应。

公开(公告)号：US06680233B2

公开(公告)日：2004-01-20

申请号：US09974167

申请日：2001-10-09

申请人： Bin Yu ,  Qi Xiang ,  HaiHong Wang

发明人： Bin Yu ,  Qi Xiang ,  HaiHong Wang

IPC分类号： H01L21336

CPC分类号： H01L29/4983 ,  H01L29/6653 ,  H01L29/6659

摘要： A semiconductor device and method of manufacture. A liner composed of a high-K material having a relative permittivity of greater than 10 is formed adjacent at least the sidewalls of a gate. Sidewall spacers are formed adjacent the gate and spaced apart from the gate by the liner. The liner can be removed using an etch process that has substantially no reaction with a gate dielectric of the gate.

摘要翻译： 半导体器件及其制造方法。 由栅极的至少侧壁形成由相对介电常数大于10的高K材料构成的衬垫。 侧壁间隔件形成在门附近并且通过衬套与门隔开。 可以使用与栅极的栅极电介质基本上没有反应的蚀刻工艺来去除衬里。

公开(公告)号：US06586808B1

公开(公告)日：2003-07-01

申请号：US10163696

申请日：2002-06-06

申请人： Qi Xiang ,  Witold P. Maszara ,  HaiHong Wang

发明人： Qi Xiang ,  Witold P. Maszara ,  HaiHong Wang

IPC分类号： H01L31119

CPC分类号： H01L29/4983 ,  H01L21/28105 ,  H01L21/28114 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6659

摘要： A MOSFET and methods of fabrication. The MOSFET includes a gate having a center gate electrode portion being spaced from the layer of semiconductor material by a center gate dielectric. The gate also includes a lateral gate electrode portion adjacent each sidewall of the center gate electrode portion. The lateral gate electrode portions are each spaced from the layer of semiconductor material by a lateral gate dielectric portion.

摘要翻译： 一种MOSFET及其制造方法。 MOSFET包括具有通过中心栅极电介质与半导体材料层间隔开的中心栅电极部分的栅极。 栅极还包括与中心栅电极部分的每个侧壁相邻的横向栅极电极部分。 横向栅极电极部分通过横向栅极电介质部分与半导体材料层间隔开。

公开(公告)号：US06630720B1

公开(公告)日：2003-10-07

申请号：US10036210

申请日：2001-12-26

申请人： Witold P. Maszara ,  HaiHong Wang ,  Qi Xiang

发明人： Witold P. Maszara ,  HaiHong Wang ,  Qi Xiang

IPC分类号： H01L2976

CPC分类号： H01L21/823842 ,  H01L21/0337 ,  H01L21/84 ,  H01L27/1203

摘要： An asymmetric semiconductor device and a method of making a pair of the asymmetric devices. The semiconductor device includes a layer of semiconductor material having a source and a drain, and a dual work function gate disposed on the layer of semiconductor material to define a channel interposed between the source and the drain.

摘要翻译： 非对称半导体器件和制造一对不对称器件的方法。 半导体器件包括具有源极和漏极的半导体材料层，以及设置在半导体材料层上以限定插入在源极和漏极之间的沟道的双功函数栅极。