公开(公告)号：US20100032796A1

公开(公告)日：2010-02-11

申请号：US12187419

申请日：2008-08-07

申请人： Brennan J. Brown ,  James R. Elliott ,  Alvin A. Joseph ,  Edward J. Nowak

发明人： Brennan J. Brown ,  James R. Elliott ,  Alvin A. Joseph ,  Edward J. Nowak

IPC分类号： H01L23/58 ,  G06F17/50

CPC分类号： H01L23/66 ,  H01L21/76289 ,  H01L21/764 ,  H01L23/585 ,  H01L27/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed are embodiments of a semiconductor structure, a design structure for the semiconductor structure and a method of forming the semiconductor structure. The embodiments reduce harmonics and improve isolation between the active semiconductor layer and the substrate of a semiconductor-on-insulator (SOI) wafer. Specifically, the embodiments incorporate a trench isolation region extending to a fully or partially amorphized region of the wafer substrate. The trench isolation region is positioned outside lateral boundaries of at least one integrated circuit device located at or above the active semiconductor layer of the SOI wafer and, thereby improves isolation. The fully or partially amorphized region of the substrate reduces substrate mobility, which reduces the charge layer at the substrate/BOX interface and, thereby reduces harmonics. Optionally, the embodiments can incorporate an air gap between the wafer substrate and integrated circuit device(s) in order to further improve isolation.

公开(公告)号：US07927963B2

公开(公告)日：2011-04-19

申请号：US12187415

申请日：2008-08-07

申请人： Brennan J. Brown ,  James R. Elliott ,  Alvin J. Joseph ,  Edward J. Nowak

发明人： Brennan J. Brown ,  James R. Elliott ,  Alvin J. Joseph ,  Edward J. Nowak

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/76283 ,  H01L21/764 ,  H01L27/12

摘要： Disclosed are embodiments of a semiconductor structure, a design structure for the semiconductor structure and a method of forming the semiconductor structure. The embodiments reduce harmonics and improve isolation between the active semiconductor layer and the substrate of a semiconductor-on-insulator (SOI) wafer. Specifically, the embodiments incorporate a trench isolation region extending to a fully or partially amorphized region of the wafer substrate. The trench isolation region is positioned outside lateral boundaries of at least one integrated circuit device located at or above the active semiconductor layer of the SOI wafer and, thereby improves isolation. The fully or partially amorphized region of the substrate reduces substrate mobility, which reduces the charge layer at the substrate/BOX interface and, thereby reduces harmonics. Optionally, the embodiments can incorporate an air gap between the wafer substrate and integrated circuit device(s) in order to further improve isolation.

摘要翻译： 公开了半导体结构的实施例，半导体结构的设计结构和形成半导体结构的方法。 这些实施例减少谐波并改善有源半导体层和绝缘体上半导体（SOI）晶片的衬底之间的隔离。 具体地，实施例结合了延伸到晶片衬底的完全或部分非晶化区域的沟槽隔离区域。 沟槽隔离区位于位于SOI晶片的有源半导体层之上或之上的至少一个集成电路器件的横向边界的外侧，从而提高了隔离度。 衬底的完全或部分非晶化区域降低衬底迁移率，这降低了衬底/ BOX界面处的电荷层，从而减少了谐波。 可选地，实施例可以在晶片衬底和集成电路器件之间并入气隙，以进一步改善隔离。

公开(公告)号：US07804151B2

公开(公告)日：2010-09-28

申请号：US12187419

申请日：2008-08-07

申请人： Brennan J. Brown ,  James R. Elliott ,  Alvin J. Joseph ,  Edward J. Nowak

发明人： Brennan J. Brown ,  James R. Elliott ,  Alvin J. Joseph ,  Edward J. Nowak

IPC分类号： H01L23/58

CPC分类号： H01L23/66 ,  H01L21/76289 ,  H01L21/764 ,  H01L23/585 ,  H01L27/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed are embodiments of a semiconductor structure, a design structure for the semiconductor structure and a method of forming the semiconductor structure. The embodiments reduce harmonics and improve isolation between the active semiconductor layer and the substrate of a semiconductor-on-insulator (SOI) wafer. Specifically, the embodiments incorporate a trench isolation region extending to a fully or partially amorphized region of the wafer substrate. The trench isolation region is positioned outside lateral boundaries of at least one integrated circuit device located at or above the active semiconductor layer of the SOI wafer and, thereby improves isolation. The fully or partially amorphized region of the substrate reduces substrate mobility, which reduces the charge layer at the substrate/BOX interface and, thereby reduces harmonics. Optionally, the embodiments can incorporate an air gap between the wafer substrate and integrated circuit device(s) in order to further improve isolation.

摘要翻译： 公开了半导体结构的实施例，半导体结构的设计结构和形成半导体结构的方法。 这些实施例减少谐波并改善有源半导体层和绝缘体上半导体（SOI）晶片的衬底之间的隔离。 具体地，实施例结合了延伸到晶片衬底的完全或部分非晶化区域的沟槽隔离区域。 沟槽隔离区位于位于SOI晶片的有源半导体层之上或之上的至少一个集成电路器件的横向边界的外侧，从而提高了隔离度。 衬底的完全或部分非晶化区域降低衬底迁移率，这降低了衬底/ BOX界面处的电荷层，从而减少了谐波。 可选地，实施例可以在晶片衬底和集成电路器件之间并入气隙，以进一步改善隔离。

公开(公告)号：US20100035403A1

公开(公告)日：2010-02-11

申请号：US12187415

申请日：2008-08-07

申请人： Brennan J. Brown ,  James R. Elliott ,  Alvin J. Joseph ,  Edward J. Nowak

发明人： Brennan J. Brown ,  James R. Elliott ,  Alvin J. Joseph ,  Edward J. Nowak

IPC分类号： H01L21/762

CPC分类号： H01L21/76224 ,  H01L21/76283 ,  H01L21/764 ,  H01L27/12

摘要： Disclosed are embodiments of a semiconductor structure, a design structure for the semiconductor structure and a method of forming the semiconductor structure. The embodiments reduce harmonics and improve isolation between the active semiconductor layer and the substrate of a semiconductor-on-insulator (SOI) wafer. Specifically, the embodiments incorporate a trench isolation region extending to a fully or partially amorphized region of the wafer substrate. The trench isolation region is positioned outside lateral boundaries of at least one integrated circuit device located at or above the active semiconductor layer of the SOI wafer and, thereby improves isolation. The fully or partially amorphized region of the substrate reduces substrate mobility, which reduces the charge layer at the substrate/BOX interface and, thereby reduces harmonics. Optionally, the embodiments can incorporate an air gap between the wafer substrate and integrated circuit device(s) in order to further improve isolation.

摘要翻译： 公开了半导体结构的实施例，半导体结构的设计结构和形成半导体结构的方法。 这些实施例减少谐波并改善有源半导体层和绝缘体上半导体（SOI）晶片的衬底之间的隔离。 具体地，实施例结合了延伸到晶片衬底的完全或部分非晶化区域的沟槽隔离区域。 沟槽隔离区位于位于SOI晶片的有源半导体层之上或之上的至少一个集成电路器件的横向边界的外侧，从而提高了隔离度。 衬底的完全或部分非晶化区域降低衬底迁移率，这降低了衬底/ BOX界面处的电荷层，从而减少了谐波。 可选地，实施例可以在晶片衬底和集成电路器件之间并入气隙，以进一步改善隔离。

公开(公告)号：US08083986B2

公开(公告)日：2011-12-27

申请号：US12315520

申请日：2008-12-04

申请人： Sang Hyouk Choi ,  Yeonjoon Park ,  Sang-Hyon Chu ,  James R. Elliott ,  Glen C. King ,  Jae-Woo Kim ,  Peter T. Lillehei ,  Diane M. Stoakley

发明人： Sang Hyouk Choi ,  Yeonjoon Park ,  Sang-Hyon Chu ,  James R. Elliott ,  Glen C. King ,  Jae-Woo Kim ,  Peter T. Lillehei ,  Diane M. Stoakley

IPC分类号： B28B1/00

CPC分类号： C22C1/04 ,  B22F2998/00 ,  B22F1/0018

摘要： A novel method to prepare an advanced thermoelectric material has hierarchical structures embedded with nanometer-sized voids which are key to enhancement of the thermoelectric performance. Solution-based thin film deposition technique enables preparation of stable film of thermoelectric material and void generator (voigen). A subsequent thermal process creates hierarchical nanovoid structure inside the thermoelectric material. Potential application areas of this advanced thermoelectric material with nanovoid structure are commercial applications (electronics cooling), medical and scientific applications (biological analysis device, medical imaging systems), telecommunications, and defense and military applications (night vision equipments).

摘要翻译： 制备高级热电材料的新方法具有嵌入纳米尺寸空隙的分层结构，这是提高热电性能的关键。 基于溶液的薄膜沉积技术使得能够制备出热电材料和空穴发生器（voigen）的稳定膜。 随后的热过程在热电材料内部产生分级纳米结构。 这种具有纳米结构的先进热电材料的潜在应用领域是商业应用（电子冷却），医学和科学应用（生物分析装置，医学成像系统），电信以及国防和军事应用（夜视设备）。

公开(公告)号：US20100039643A1

公开(公告)日：2010-02-18

申请号：US12496788

申请日：2009-07-02

申请人： Yeonjoon Park ,  Sang H. Choi ,  Glen C. King ,  James R. Elliott

发明人： Yeonjoon Park ,  Sang H. Choi ,  Glen C. King ,  James R. Elliott

IPC分类号： G01J3/28

CPC分类号： G01J3/18 ,  G01J3/02 ,  G01J3/0229 ,  G01J2003/1861 ,  G02F1/134309

摘要： A spectrometer system includes an optical assembly for collimating light, a micro-ring grating assembly having a plurality of coaxially-aligned ring gratings, an aperture device defining an aperture circumscribing a target focal point, and a photon detector. An electro-optical layer of the grating assembly may be electrically connected to an energy supply to change the refractive index of the electro-optical layer. Alternately, the gratings may be electrically connected to the energy supply and energized, e.g., with alternating voltages, to change the refractive index. A data recorder may record the predetermined spectral characteristic. A method of detecting a spectral characteristic of a predetermined wavelength of source light includes generating collimated light using an optical assembly, directing the collimated light onto the micro-ring grating assembly, and selectively energizing the micro-ring grating assembly to diffract the predetermined wavelength onto the target focal point, and detecting the spectral characteristic using a photon detector.

摘要翻译： 光谱仪系统包括用于准直光的光学组件，具有多个同轴对准的环形光栅的微环格栅组件，限定限定目标焦点的孔的孔装置和光子检测器。 光栅组件的电光层可电连接到能量源以改变电光层的折射率。 或者，光栅可以电连接到能量供应并且例如用交流电压通电，以改变折射率。 数据记录器可以记录预定的光谱特性。 检测源光的预定波长的光谱特性的方法包括使用光学组件产生准直光，将准直光引导到微环格栅组件上，以及选择性地激励微环格栅组件以将预定波长衍射到 目标焦点，并使用光子检测器检测光谱特性。

公开(公告)号：US20100039641A1

公开(公告)日：2010-02-18

申请号：US12487735

申请日：2009-06-19

申请人： Yeonjoon Park ,  Glen C. King ,  James R. Elliott ,  Sang H. Choi

发明人： Yeonjoon Park ,  Glen C. King ,  James R. Elliott ,  Sang H. Choi

IPC分类号： G01J3/04 ,  G01J3/28

CPC分类号： G01J3/18 ,  G01J3/02 ,  G01J3/0229 ,  G01J3/0237 ,  G01J3/0256 ,  G02B5/005 ,  G02B5/1876

摘要： A spectrometer includes a micro-ring grating device having coaxially-aligned ring gratings for diffracting incident light onto a target focal point, a detection device for detecting light intensity, one or more actuators, and an adjustable aperture device defining a circular aperture. The aperture circumscribes a target focal point, and directs a light to the detection device. The aperture device is selectively adjustable using the actuators to select a portion of a frequency band for transmission to the detection device. A method of detecting intensity of a selected band of incident light includes directing incident light onto coaxially-aligned ring gratings of a micro-ring grating device, and diffracting the selected band onto a target focal point using the ring gratings. The method includes using an actuator to adjust an aperture device and pass a selected portion of the frequency band to a detection device for measuring the intensity of the selected portion.

摘要翻译： 光谱仪包括具有用于将入射光衍射到目标焦点的同轴对准环形光栅的微环格栅装置，用于检测光强度的检测装置，一个或多个致动器以及限定圆形孔径的可调节孔径装置。 光圈限定目标焦点，并将光引导到检测装置。 使用致动器可选择性地调节孔径装置，以选择频带的一部分以传输到检测装置。 检测入射光的所选频带的强度的方法包括将入射光引导到微环光栅装置的同轴对准的环形光栅上，并使用环形光栅将所选择的带衍射到目标焦点上。 该方法包括使用致动器来调节孔径装置并将频带的选定部分传递到用于测量所选部分的强度的检测装置。

公开(公告)号：US20090231677A1

公开(公告)日：2009-09-17

申请号：US12047465

申请日：2008-03-13

申请人： Yeonjoon Park ,  Sang H. Choi ,  Glen C. King ,  James R. Elliott

发明人： Yeonjoon Park ,  Sang H. Choi ,  Glen C. King ,  James R. Elliott

IPC分类号： G02F1/29

CPC分类号： G02B3/14 ,  G02F2001/291

摘要： An optical assembly includes a zone plate and electro-optic material disposed on one side of the zone plate. The electro-optic material's index of refraction is controlled to adjust the optical properties of the optical assembly.

摘要翻译： 光学组件包括设置在区域板一侧的区域板和电光材料。 电光材料的折射率被控制以调整光学组件的光学特性。

公开(公告)号：US07446007B2

公开(公告)日：2008-11-04

申请号：US11560893

申请日：2006-11-17

申请人： James W. Adkisson ,  Marc W. Cantell ,  James R. Elliott ,  James V. Hart, III ,  Dale W. Martin

发明人： James W. Adkisson ,  Marc W. Cantell ,  James R. Elliott ,  James V. Hart, III ,  Dale W. Martin

IPC分类号： H01L21/336

CPC分类号： H01L29/4983 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659

摘要： A semiconductor structure includes a multi-layer spacer located adjacent and adjoining a sidewall of a topographic feature within the semiconductor structure. The multi-layer spacer includes a first spacer sub-layer comprising a deposited silicon oxide material laminated to a second spacer sub-layer comprising a material that is other than the deposited silicon oxide material. The first spacer sub-layer is recessed with respect to the second spacer sub-layer by a recess distance of no greater than a thickness of the first spacer sub-layer (and preferably from about 50 to about 150 angstroms). Such a recess distance is realized through use of a chemical oxide removal (COR) etchant that is self limiting for the deposited silicon oxide material with respect to a thermally grown silicon oxide material. Dimensional integrity and delamination avoidance is thus assured for the multi-layer spacer layer.

摘要翻译： 半导体结构包括位于半导体结构内邻近并毗邻地形特征的侧壁的多层隔离物。 多层间隔物包括第一间隔子层，该第一间隔子层包含层叠到包含不同于沉积氧化硅材料的材料的第二间隔子层的沉积氧化硅材料。 第一间隔子层相对于第二间隔物子层凹陷凹陷距离不大于第一间隔子层的厚度（优选为约50至约150埃）。 通过使用相对于热生长的氧化硅材料对沉积的氧化硅材料来说是自限制的化学氧化物去除（COR）蚀刻剂来实现这种凹陷距离。 因此确保了多层间隔层的尺寸完整性和分层避免。

公开(公告)号：US08226767B2

公开(公告)日：2012-07-24

申请号：US12254134

申请日：2008-10-20

申请人： Yeonjoon Park ,  Sang H. Choi ,  Glen C. King ,  James R. Elliott

发明人： Yeonjoon Park ,  Sang H. Choi ,  Glen C. King ,  James R. Elliott

IPC分类号： C30B25/18

CPC分类号： G01N23/207

摘要： “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.

摘要翻译： “超异质外延”组合包括在具有不同晶体结构的不同材料上的一种材料的外延生长。 可以使用“Tri-Unity”系统来识别兼容的晶体结构。 基于根据晶格匹配方程确定构成材料的混合晶格常数，为每种组合提供了新的带隙工程图。 对于先前测试的材料，使用已知的带隙图，可以通过参考图和晶格匹配方程来形成具有匹配所需衬底并具有期望带隙特性的晶格常数的新材料。 在一个实施例中，该分析使得可以配制新的超异质外延半导体系统，例如基于c面LaF 3上的基于IV族合金的系统; Ⅳ族合金在c面l石上; Ⅲ-Ⅴ族合金在c面硅酸盐岩上; 和II-VI族组合在c面蓝宝石上。