摘要:
A digital television (DTV) transmitter and a method of processing known data in the DTV transmitter are disclosed. The method of processing known data in a digital television (DTV) transmitter includes generating a known data sequence, trellis-encoding the known data sequence, the trellis-encoded known data sequence having upper, middle, and lower bits, wherein at least one of the upper, middle, and lower bits has an m-sequence property, and mapping the trellis-encoded known data sequence into one of 2-level, 4-level, and 8-level data sequences, wherein the mapped data sequence has substantially an m-sequence property, wherein a data sequence has an m-sequence property when a peak value among auto-correlation values of the data sequence having a length of N is 1 and all the off-peak auto-correlation values are −1/N.
摘要:
A DTV transmitter includes a pre-processor pre-processing enhanced data, a data formatter generating enhanced data packets including the pre-processed data and inserting known data place holders to the data packets, and a multiplexer multiplexing the enhanced data packets with main data packets. It further includes an RS encoder which RS-codes the multiplexed data packets, and a data interleaver which interleaves the RS-coded data packets. The RS encoder adds systematic RS parity data to each main data packet and adds non-systematic RS parity place holders to each enhanced data packet. The RS encoder adds the RS parity place holders such that the RS parity place holders are placed after the enhanced data within each interleaved enhanced data packet.
摘要:
A DTV receiver includes a tuner, a demodulator, a known sequence detector, and a frequency domain equalizer. The tuner initially receives a broadcast signal including valid data in which a known data sequence is periodically repeated. The demodulator demodulates the broadcast signal, and the known sequence detector detects the known data sequence from the demodulated signal. The frequency domain equalizer compensates channel distortion of the demodulated broadcast signal in a frequency domain using the detected known data sequence. In addition, the DTV receiver may further include a time domain equalizer which compensates channel distortion of the time domain signal, or a noise canceller which removes a predicted noise from the time domain signal.
摘要:
A digital television (DTV) transmitting system includes a first frame decoder, a second frame decoder, and a frame multiplexer. The first frame decoder forms first enhanced data frames, encodes each data frame for error correction, forms a first super frame by combining the encoded first frames, and interleaves the first super frame. The second frame decoder forms second enhanced data frames, encodes each data frame for error correction, forms a second super frame by combining the encoded second frames, and interleaves the second super frame. The frame multiplexer multiplexes the interleaved first and second enhanced data frames.
摘要:
A DTV receiver includes a tuner tuning to a channel to receive a broadcast signal, and a demodulator demodulating the broadcast signal. The receiver further includes a first decoder which decodes main and enhanced data included in the demodulated signal by calculating soft decision values for the enhanced data and hard decision values for the main data. The receiver further includes a second decoder for decoding the main and enhanced data for first forward error correction, and a third decoder for decoding the FEC-decoded enhanced data for second forward error correction.
摘要:
A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and adds parity data into the data frame. The frame encoder further divides the data frame into first and second sub-frames including first and second portions of the parity data, respectively, and permutes a plurality of the first sub-frames and a plurality of the second sub-frames, respectively. The randomizer randomizes enhanced data in the permuted sub-frames, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the 1/N1 coded data into at least one of the data regions. The deinterleaver deiniterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets.
摘要:
A channel equalizer includes a channel estimator, a coefficient calculator, a multiplier, and an error remover. The channel estimator estimates a channel impulse response (CIR) of input data in which a known data sequence is periodically inserted. The coefficient calculator calculates equalization coefficients using estimated CIR, and the multiplier multiplies the input data with the equalization coefficients for channel equalization. The error removes estimates a residual carrier phase error of the channel-equalized input data and removes the estimated phase error from the input data.
摘要:
A digital broadcast transmitting/receiving system and a method for processing data are disclosed. The method for processing data may enhance the receiving performance of the receiving system by performing additional coding and multiplexing processes on the traffic information data and transmitting the processed data. Thus, robustness is provided to the traffic information data, thereby enabling the data to respond strongly against the channel environment which is always under constant and vast change.
摘要:
A digital broadcast transmitting/receiving system and a method for processing data are disclosed. The method for processing data may enhance the receiving performance of the receiving system by performing additional coding and multiplexing processes on the traffic information data and transmitting the processed data. Thus, robustness is provided to the traffic information data, thereby enabling the data to respond strongly against the channel environment which is always under constant and vast change.
摘要:
A DTV transmitting system includes a pre-processor, a block processor, and a trellis encoder. The pre-processor pre-processes enhanced data by expanding the enhanced data at an expansion rate of 1/H. The block processor includes a first converter, a symbol encoder, a symbol interleaver, and a second converter. The first converter converts the expanded data into symbols. The symbol encoder encodes each valid enhanced data bit in the symbols at an effective coding rate of 1/H. The symbol interleaver interleaves the encoded symbols, and the second converter converts the interleaved symbols into enhanced data bytes. The trellis encoder trellis-encodes the enhanced data outputted from the block processor.