Thin film transistor substrate and method of fabricating the same
    5.
    发明授权
    Thin film transistor substrate and method of fabricating the same 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US08558230B2

    公开(公告)日:2013-10-15

    申请号:US12756323

    申请日:2010-04-08

    IPC分类号: H01L29/04 H01L29/10

    摘要: A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate wiring formed on an insulating substrate. Oxide active layer patterns may be formed on the gate wiring and may include a first substance. Data wiring may be formed on the oxide active layer patterns to cross the gate wiring and may include a second substance. Barrier layer patterns may be disposed between the oxide active layer patterns and the data wiring and may include a third substance.

    摘要翻译: 提供薄膜晶体管(TFT)基板及其制造方法。 薄膜晶体管基板可以具有低电阻特性,并且可以减少有源层图案和数据布线之间的相互扩散和接触电阻。 薄膜晶体管基板可以包括形成在绝缘基板上的栅极布线。 氧化物有源层图案可以形成在栅极布线上,并且可以包括第一物质。 数据布线可以形成在氧化物有源层图案上以跨越栅极布线,并且可以包括第二物质。 阻挡层图案可以设置在氧化物活性层图案和数据布线之间,并且可以包括第三物质。

    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20100276686A1

    公开(公告)日:2010-11-04

    申请号:US12756323

    申请日:2010-04-08

    摘要: A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate wiring formed on an insulating substrate. Oxide active layer patterns may be formed on the gate wiring and may include a first substance. Data wiring may be formed on the oxide active layer patterns to cross the gate wiring and may include a second substance. Barrier layer patterns may be disposed between the oxide active layer patterns and the data wiring and may include a third substance.

    摘要翻译: 提供薄膜晶体管(TFT)基板及其制造方法。 薄膜晶体管基板可以具有低电阻特性,并且可以减少有源层图案和数据布线之间的相互扩散和接触电阻。 薄膜晶体管基板可以包括形成在绝缘基板上的栅极布线。 氧化物有源层图案可以形成在栅极布线上,并且可以包括第一物质。 数据布线可以形成在氧化物有源层图案上以跨越栅极布线,并且可以包括第二物质。 阻挡层图案可以设置在氧化物活性层图案和数据布线之间,并且可以包括第三物质。

    Method for manufacturing a signal line, thin film transistor panel, and method for manufacturing the thin film transistor panel
    8.
    发明授权
    Method for manufacturing a signal line, thin film transistor panel, and method for manufacturing the thin film transistor panel 有权
    信号线的制造方法,薄膜晶体管面板,以及薄膜晶体管面板的制造方法

    公开(公告)号:US07811868B2

    公开(公告)日:2010-10-12

    申请号:US11932233

    申请日:2007-10-31

    IPC分类号: H01L21/768

    摘要: A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode.

    摘要翻译: 一种制造薄膜晶体管阵列面板的方法,包括在基板上形成栅极线; 在栅极线上顺序地形成栅极绝缘层,硅层和包括下层和上层的导体层,在导体层上形成光致抗蚀剂膜,图案化光致抗蚀剂膜以形成包括第一 部分和第二部分具有比第一部分更大的厚度,通过使用光致抗蚀剂图案作为蚀刻掩模蚀刻上层和下层,通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻硅层以形成半导体, 通过使用回蚀工艺去除光致抗蚀剂图案的第二部分,通过使用光致抗蚀剂图案作为蚀刻掩模来选择性地湿法蚀刻导体层的上层,通过使用光致抗蚀剂干蚀刻导体层的下层 图案作为蚀刻掩模以形成包括剩余的上层和下层的数据线和漏极,并且形成连接到漏电极的像素电极 。