公开(公告)号：US07017070B1

公开(公告)日：2006-03-21

申请号：US09687858

申请日：2000-10-13

申请人： Chak Cheung Edward Ho ,  Oleg Drapkin ,  Carl Mizuyabu ,  Ray Chau ,  Gordon Caruk

发明人： Chak Cheung Edward Ho ,  Oleg Drapkin ,  Carl Mizuyabu ,  Ray Chau ,  Gordon Caruk

IPC分类号： G06F1/12 ,  G06F1/04

CPC分类号： G06F13/4243 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222

摘要： A signal phase shifting circuit shifts the phase of an input signal, such as a STROBE signal, based on a reference signal, such as a CLOCK signal, to facilitate, for example, receiving of double data rate data. The signal phase shifting circuit includes a reference signal period dividing circuit having a feedback delay matching array operatively coupled to one of a plurality of voltage control delay lines. This signal phase shifting circuit also includes a variable delay circuit that provides a phase shifted output signal, such as a phase shifted STROBE signal, that includes a delay stage in a phase shifted output signal drive buffer coupled to the delay stage, such as a voltage control delay line. The feedback delay matching array includes a plurality of serially coupled buffer stages operatively coupled to compensate for delay variations associated with the phase shifted output signal drive buffer in the variable delay circuit.

摘要翻译： 信号移相电路基于诸如CLOCK信号的参考信号来移动诸如STROBE信号的输入信号的相位，以便于例如接收双倍数据速率数据。 信号移相电路包括具有可操作地耦合到多个电压控制延迟线之一的反馈延迟匹配阵列的参考信号周期分频电路。 该信号移相电路还包括可变延迟电路，其提供相移输出信号，例如相移的STROBE信号，该相移输出信号包括耦合到延迟级的相移输出信号驱动缓冲器中的延迟级，例如电压 控制延时线。 反馈延迟匹配阵列包括可操作地耦合以补偿与可变延迟电路中的相移输出信号驱动缓冲器相关联的延迟变化的多个串联耦合缓冲器级。

公开(公告)号：US20060282604A1

公开(公告)日：2006-12-14

申请号：US11139733

申请日：2005-05-27

申请人： Grigori Temkine ,  Oleg Drapkin ,  Gordon Caruk

发明人： Grigori Temkine ,  Oleg Drapkin ,  Gordon Caruk

IPC分类号： G06F13/36

CPC分类号： G06T1/20 ,  G06T2200/28 ,  G06T2210/52 ,  G09G5/363

摘要： Methods and apparatus for providing multiple graphics processing capacity, while utilizing unused integrated graphics processing circuitry on a bridge circuit along with an external or discrete graphics processing unit is disclosed. In particular, a bridge circuit includes an integrated graphics processing circuit configured to process graphics jobs. The bridge circuit also includes an interface operable according to interface with a discrete graphics processing circuit. A controller is included with the bridge circuit and responsive whenever the discrete graphics processing circuit is coupled to the interface to cause the integrated graphics processing circuit to process a task of the graphics job in conjunction with operation of the discrete graphics processing circuit that is operable to process another task of the graphics job. Corresponding methods are also disclosed.

摘要翻译： 公开了一种用于提供多种图形处理能力的方法和装置，同时利用桥接电路上的未使用的集成图形处理电路以及外部或分立的图形处理单元。 特别地，桥接电路包括被配置为处理图形作业的集成图形处理电路。 桥接电路还包括根据与分立图形处理电路的接口可操作的接口。 控制器包括在桥接电路中，并且每当离散图形处理电路耦合到接口时响应，使得集成图形处理电路结合图形处理电路的任务结合可分离的图形处理电路 处理图形作业的另一个任务。 还公开了相应的方法。

公开(公告)号：US07096303B1

公开(公告)日：2006-08-22

申请号：US09586868

申请日：2000-06-05

申请人： Gordon Caruk ,  Kuldip Sahdra ,  Arkadi Avrukin ,  Michael Frank ,  Jamil Ahmed ,  James B. Fry ,  Sasa Marinkovic

发明人： Gordon Caruk ,  Kuldip Sahdra ,  Arkadi Avrukin ,  Michael Frank ,  Jamil Ahmed ,  James B. Fry ,  Sasa Marinkovic

IPC分类号： G06F13/36

CPC分类号： G06F13/4027

摘要： A configurable bus interface circuit includes an internal bus bridge and an internal circuit. The configurable bus interface circuit also includes an internal I/O circuit couplable to an external circuit, via the internal bus bridge. The configurable bus interface circuit electrically isolates the internal circuit to avoid the propagation of signals between the internal I/O circuit and the external circuit.

摘要翻译： 可配置的总线接口电路包括内部总线桥和内部电路。 可配置总线接口电路还包括可通过内部总线桥接器连接到外部电路的内部I / O电路。 可配置总线接口电路将内部电路电隔离，以避免内部I / O电路和外部电路之间的信号传播。

公开(公告)号：US6072507A

公开(公告)日：2000-06-06

申请号：US58949

申请日：1998-04-10

申请人： Aris Balatsos ,  Milivoje Aleksic ,  Gordon Caruk ,  Andrew E. Gruber

发明人： Aris Balatsos ,  Milivoje Aleksic ,  Gordon Caruk ,  Andrew E. Gruber

IPC分类号： G06F12/02 ,  G06F12/06

CPC分类号： G06F12/0207

摘要： A method and apparatus for mapping a linear address to a tiled address that reduces latency between retrieval of pages of data is accomplished when a video graphics processor receives a linear address from the central processing unit and determines whether the linear address is referencing a tiled surface, which is one of up to four portions of the memory. If so, the video graphics processor obtains parameters of the tiled surface. Having obtained the parameters, the video graphics processor determines a normalized linear address based on at least one of the parameters and the linear address. Having done this, the video graphics processor determines a band pointer of the tiled surface based on at least one of the parameters, the normalized linear address and a modular function. In essence, the band pointer points to a normalized initial address of a band of a tiled surface, which includes a plurality of bands. Having obtained the band pointer, the video graphics processor then determines a linear band offset based on the band pointer and at least one of the parameters. Next, a tiled band offset is determined based on the linear band offset. Finally, the tiled address is determined based on the tiled band offset, the band pointer, and at least one of the parameters.

摘要翻译： 当视频图形处理器从中央处理单元接收到线性地址并确定线性地址是否参考平铺表面时，实现了将线性地址映射到平铺地址的方法和装置，其减少数据页面检索之间的等待时间， 这是记忆最多四部分之一。 如果是这样，则视频图形处理器获得平铺表面的参数。 在获得参数之后，视频图形处理器基于参数和线性地址中的至少一个来确定归一化的线性地址。 完成这一点后，视频图形处理器基于至少一个参数，归一化的线性地址和模块化功能来确定平铺表面的波段指针。 本质上，频带指针指向包括多个频带的平铺表面的频带的归一化初始地址。 在获得频带指针之后，视频图形处理器然后基于频带指针和至少一个参数来确定线性频带偏移。 接下来，基于线性带偏移确定平铺频带偏移。 最后，根据平铺频带偏移，频带指针和至少一个参数确定平铺地址。

公开(公告)号：US20060023633A1

公开(公告)日：2006-02-02

申请号：US10893641

申请日：2004-07-16

申请人： Gordon Caruk ,  Carrell Killebrew

发明人： Gordon Caruk ,  Carrell Killebrew

IPC分类号： H04J1/16

CPC分类号： G06F1/325 ,  G06F1/3203

摘要： Briefly, a method, apparatus and system for managing power corresponding to a differential serial communication link that has a link width defined for example by one or more lanes wherein the lanes are adapted to communicate clock recovery information in a data stream, determines, during normal operating conditions, such as conditions other than power on, reset or link fault conditions, a desired link width for the serial communication link and then changes the link width accordingly.

公开(公告)号：US06789154B1

公开(公告)日：2004-09-07

申请号：US09579203

申请日：2000-05-26

申请人： Brian Lee ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Milivoje Aleksic

发明人： Brian Lee ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Milivoje Aleksic

IPC分类号： G06F1314

CPC分类号： G06F13/404

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US06670958B1

公开(公告)日：2003-12-30

申请号：US09579224

申请日：2000-05-26

申请人： Milivoje Aleksic ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

发明人： Milivoje Aleksic ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

IPC分类号： G06F1516

CPC分类号： G06F3/14 ,  G09G5/363 ,  G09G2352/00

摘要： In a specific embodiment, a system for providing video includes a system bus, which in one embodiment is an Advanced Graphics Port (AGP) busy. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，用于提供视频的系统包括系统总线，其在一个实施例中是高级图形端口（AGP）忙。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US06662257B1

公开(公告)日：2003-12-09

申请号：US09579202

申请日：2000-05-26

申请人： Gordon Caruk ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Milivoje Aleksic ,  Brian Lee

发明人： Gordon Caruk ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Milivoje Aleksic ,  Brian Lee

IPC分类号： G06F1314

CPC分类号： G06F13/404 ,  G06F3/14

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US20070260796A1

公开(公告)日：2007-11-08

申请号：US11418788

申请日：2006-05-05

申请人： Mark Grossman ,  Jeffrey Cheng ,  Gordon Caruk ,  Joel Wilke ,  Elaine Poon

发明人： Mark Grossman ,  Jeffrey Cheng ,  Gordon Caruk ,  Joel Wilke ,  Elaine Poon

IPC分类号： G06F13/24

CPC分类号： G06F13/24

摘要： Embodiments of a system and method for handling interrupts are described herein. In an embodiment interrupts from various client components in a system (also referred to as clients) are processed by an interrupt handler component uniformly. The various clients signal interrupts in different manners. For example, some clients signal interrupts in a level-based manner, and some clients signal interrupts in a pulse-based manner. In an embodiment, all interrupts received by the interrupt handler are formed into an event message according to a uniform format regardless of the manner in which the interrupt is signaled. The event message includes all information necessary for a host processor interrupt service routine (ISR) to service the interrupts without reading hardware registers. Event messages are stored in an event buffer for access and handling by the host. The event buffer is managed by the interrupt handler.

摘要翻译： 本文描述了用于处理中断的系统和方法的实施例。 在一个实施例中，由系统中的各种客户端组件（也称为客户端）的中断由中断处理程序组件均匀地处理。 各种客户端以不同的方式发出中断信号。 例如，一些客户端以基于电平的方式发送中断，并且一些客户端以基于脉冲的方式发送中断。 在一个实施例中，中断处理程序接收到的所有中断都是根据均匀的格式形成事件消息，而不管中断信号的方式如何。 事件消息包括主机处理器中断服务程序（ISR）在不读取硬件寄存器的情况下服务中断所需的所有信息。 事件消息存储在事件缓冲区中以供主机访问和处理。 事件缓冲区由中断处理程序管理。

公开(公告)号：US06633296B1

公开(公告)日：2003-10-14

申请号：US09579432

申请日：2000-05-26

申请人： Indra Laksono ,  Milivoje Aleksic ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

发明人： Indra Laksono ,  Milivoje Aleksic ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

IPC分类号： G06F1516

CPC分类号： G06F3/14 ,  G09G5/363 ,  G09G2352/00 ,  G09G2360/06

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换