摘要:
An inverting amplifying circuit for outputting an inversion of an input with good linearity, having an inverter circuit, a feedback capacitance, an input capacitance, a first refresh switch, a second refresh switch, a sleep switch, and a first cutoff switch. A sleep voltage is input through the sleep switch to the inverter circuit for minimizing the electrical power consumption. The sleep switch connects a terminal of the inverter circuit directly to ground when in a sleep mode. The first cut off switch is connected between an output of the inverter circuit and an output of the inverting amplifying circuit.
摘要:
A computational circuit for a multi-value addition comprising a parallel adder, an output adder, a quantizing portion and a logic conversion portion. Addition circuits in the above adders and thresholding circuits in the above quantizing portion consist of voltage-driven circuits including capacitive couplings.
摘要:
An object of the present invention is to provide a matched filter circuit of small size and consuming low electric power. Paying attention that a spreading code is a 1 bit data string, an input signal is sampled and held as an analog signal along the time sequence, classified into "1" and "-1" and the classified signals are added in parallel by capacitive coupling in a matched filter circuit according to the present invention.
摘要:
The present invention provides a matched filter which can refresh an entire while keeping the speed of a calculation comparable to a small sized circuit. The first and second addition circuits of a matched filter of the present invention are classified into a plurality of groups, the first and second auxiliary adders replace functions for the groups of the first and second adders respectively. The outputs of the first and second adders are then inputted to the first and second subtractors, respectively, and the refreshing means appropriately refreshes the groups replaced by the first and second auxiliary adders. Further, the present invention decreases the number of auxiliary sapling and holding circuits to be used, and decides the refreshing intervals by considering the change of the voltage caused by leakage and other permissible errors of output voltage.
摘要:
A signal reception apparatus in the spread spectrum communication system requires only a small amount of circuitry and consumes a small amount of electric power. A quadrature detector decomposes received signals into in-phase components and quadrature components, and supplies them to a complex-type matched filter. The complex-type matched filter de-spreads the in-phase components and the quadrature components and sends them to a multi-path selector. The multi-path selector selects, from among the received de-spread signals, multiple paths having high levels of signal electric powers and sends the received signals of the selected paths to multiple phase correction blocks. Analog operation circuits calculate phase errors of the received signals of two successive pilot symbol blocks for each path. An analog operation circuit corrects the phases of the received signals of the information symbol block that has been received between the two successive pilot symbol blocks. A rake combiner synchronously combines the phase-corrected de-spread received signals of each path.
摘要:
The present invention provides a path-diversity system featuring a small-size phase compensating circuit. This circuit calculates a compensating coefficient according to the signals of a pilot block or a pair of pilot blocks surrounding an information block, and then compensates information signals thereafter by the calculated compensating coefficient.
摘要:
A complex multiplication circuit of a calculation formula equivalent but different from the usual formula.The calculation formula is as follows:Pr={x(a+b)-b(x+y)} equivalent to (ax-by)Pi={y(a-b)+b(x+y)} equivalent to (ay+bx)Here,Input signal: x+jyMultiplier:a+jbMultiplication result:Pr+jPi.
摘要:
This invention reduces electric power consumption of a CDMA communication system receiver while it is in the wait mode. A received spread spectrum signal is demodulated in multiplication means into baseband signals Ri and Rq, and inputted into a complex matched filter. This filter is intermittently driven by supply voltage control means to perform acquisition of received signals. When an electric power calculation circuit detects the output of the filter to reach a peak equal to or greater than a predetermined value, the received signals undergo acquisition by controlling n number of correlators 26-1 to 26-n to work by a correlator controlling circuit. Moreover, de-spreading is performed. The outputs from each correlator 46-1 to 26-n are given to a RAKE combiner and demodulated by the RAKE by a combining and demodulating circuit.
摘要:
A fast spread spectrum communication system is provided, having fewer circuits and requiring fewer PN codes to be assigned to a user. A series of digital data to be transmitted, is divided into 4-bit frames. The 4-bit data of each frame is divided into the first through fourth elements in a predetermined order. The first complex number is constructed by the first and second elements, and the second complex number is determined according to the value of the third and fourth elements. The spectrum of the data to be transmitted is spread by multiplying these complex numbers. Four matched filters despread a received signal by different combinations of PN codes stored in a receiver. The first through fourth elements are recovered according to the outputs of the matched filters.
摘要:
A matched filter with reduced electric power consumption is disclosed. The matched filter circuit power consumption is reduced by stopping the electric power supply to an unnecessary circuit since input signal is partially sampled just after an acquisition. Since the spreading code is 1 bit data string, the input signal sampled and held is branched out into the signal groups "1" and "-1" by a multiplexer. The signals in each groups are added in parallel by a capacitive coupling, and the electric power is supplied in the circuit intermittently.