利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

71 条记录 (耗时 0.041 秒)

    FORMATION OF AIR GAP WITH PROTECTION OF METAL LINES
    5.
    发明申请
    FORMATION OF AIR GAP WITH PROTECTION OF METAL LINES 失效
    形成有保护金属线的空气隙

    公开(公告)号：US20110193230A1

    公开(公告)日：2011-08-11

    申请号：US12700792

    申请日：2010-02-05

    申请人： Takeshi Nogami ,  Shyng-Tsong Chen ,  David V. Horak ,  Son V. Nguyen ,  Shom Ponoth ,  Chih-Chao Yang

    发明人： Takeshi Nogami ,  Shyng-Tsong Chen ,  David V. Horak ,  Son V. Nguyen ,  Shom Ponoth ,  Chih-Chao Yang

    IPC分类号： H01L23/532 ,  H01L21/768

    CPC分类号： H01L24/80 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295

    摘要： A method is provided for fabricating a microelectronic element having an air gap in a dielectric layer thereof. A dielectric cap layer can be formed which has a first portion overlying surfaces of metal lines, the first portion extending a first height above a height of a surface of the dielectric layer and a second portion overlying the dielectric layer surface and extending a second height above the height of the surface of the dielectric layer, the second height being greater than the first height. After forming the cap layer, a mask can be formed over the cap layer. The mask can have a multiplicity of randomly disposed holes. Each hole may expose a surface of only the second portion of the cap layer which has the greater height. The mask may fully cover a surface of the first portion of the cap layer having the lower height. Subsequently, an etchant can be directed towards the first and second portions of the cap layer to form holes in the cap layer aligned with the holes in the mask. Material can be removed from the dielectric layer where exposed to the etchant by the holes in the cap layer. At such time, the mask can protect the first portion of the cap layer and the metal lines from being attacked by the etchant.

    摘要翻译： 提供了一种用于制造其电介质层中具有气隙的微电子元件的方法。 可以形成介电盖层，其具有覆盖金属线表面的第一部分，第一部分在电介质层的表面的高度之上延伸第一高度，以及覆盖介电层表面的第二部分，并且延伸第二高度 电介质层的表面的高度，第二高度大于第一高度。 在形成盖层之后，可以在盖层之上形成掩模。 掩模可以具有多个随机布置的孔。 每个孔可以暴露仅具有较大高度的盖层的第二部分的表面。 掩模可以完全覆盖具有较低高度的盖层的第一部分的表面。 随后，可以将蚀刻剂引导到盖层的第一和第二部分，以在盖层中形成与掩模中的孔对准的孔。 可以通过盖层中的孔从暴露于蚀刻剂的介电层去除材料。 此时，掩模可以保护盖层的第一部分和金属线不被蚀刻剂侵蚀。

    Formation of air gap with protection of metal lines
    6.
    发明授权
    Formation of air gap with protection of metal lines 失效
    形成气隙，保护金属线

    公开(公告)号：US08399350B2

    公开(公告)日：2013-03-19

    申请号：US12700792

    申请日：2010-02-05

    申请人： Takeshi Nogami ,  Shyng-Tsong Chen ,  David V. Horak ,  Son V. Nguyen ,  Shom Ponoth ,  Chih-Chao Yang

    发明人： Takeshi Nogami ,  Shyng-Tsong Chen ,  David V. Horak ,  Son V. Nguyen ,  Shom Ponoth ,  Chih-Chao Yang

    IPC分类号： H01L21/4763

    CPC分类号： H01L24/80 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295

    摘要： Method for fabricating a microelectronic element having an air gap in a dielectric layer thereof. A dielectric cap layer can be formed which has a first portion overlying surfaces of metal lines, the first portion extending a first height above a height of a surface of the dielectric layer, and a second portion overlying the dielectric layer surface and extending a second height above the height of the surface of the dielectric layer, the second height being greater than the first height. After forming the cap layer, a mask can be formed over the cap layer. The mask exposes a surface of only the second portion of the cap layer which has the greater height. Subsequently, an etchant can be directed towards the first and second portions of the cap layer. Material can be removed from the dielectric layer where exposed to the etchant.

    摘要翻译： 一种在其电介质层中具有气隙的微电子元件的制造方法。 可以形成介电盖层，其具有覆盖金属线表面的第一部分，第一部分在电介质层表面的高度之上延伸第一高度，以及覆盖介电层表面的第二部分，并延伸第二高度 高于介电层表面的高度，第二高度大于第一高度。 在形成盖层之后，可以在盖层之上形成掩模。 掩模仅暴露具有较大高度的盖层的第二部分的表面。 随后，蚀刻剂可以被引导到盖层的第一和第二部分。 材料可以从暴露于蚀刻剂的介电层去除。

    Method for fabricating back end of the line structures with liner and seed materials
    7.
    发明授权
    Method for fabricating back end of the line structures with liner and seed materials 失效
    用衬里和种子材料制造线结构后端的方法

    公开(公告)号：US08232195B2

    公开(公告)日：2012-07-31

    申请号：US12137875

    申请日：2008-06-12

    申请人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry A. Spooner

    发明人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry A. Spooner

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76846 ,  H01L21/76865

    摘要： A sputter-etching method employed to achieve a thinned down noble metal liner layer deposited on the surface or field of an intermediate back end of the line (BEOL) interconnect structure. The noble metal liner layer is substantially thinned down to a point where the effect of the noble metal has no significant effect in the chemical-mechanical polishing (CMP) process. The noble metal liner layer may be completely removed by sputter etching to facilitate effective planarization by chemical-mechanical polishing to take place.

    摘要翻译： 用于实现沉积在线（BEOL）互连结构的中间后端的表面或场上的减薄的贵金属衬里层的溅射蚀刻方法。 贵金属衬里层基本上变薄到贵金属的作用在化学机械抛光（CMP）工艺中没有显着影响的程度。 可以通过溅射蚀刻完全去除贵金属衬里层，以便通过化学机械抛光发生有效的平坦化。

    Back end of the line structures with liner and noble metal layer
    8.
    发明授权
    Back end of the line structures with liner and noble metal layer 有权
    具有衬垫和贵金属层的线结构的后端

    公开(公告)号：US07402883B2

    公开(公告)日：2008-07-22

    申请号：US11380074

    申请日：2006-04-25

    申请人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry A. Spooner

    发明人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry A. Spooner

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76846 ,  H01L21/76865

    摘要： A back end of the line (BEOL) structure of a semiconductor device is presented. In one embodiment, the structure may include a first liner layer disposed on an intermediate interconnect structure, the intermediate interconnect structure having an opening disposed between two surfaces of a dielectric material, wherein the first liner layer is in direct contact with at least a portion of a conductive wiring material of an underneath interconnect layer; a noble metal layer disposed on the first liner layer at least in the opening; and a conductive wiring material disposed on the noble metal layer, the conductive wiring material substantially filling the opening; wherein the first liner layer, the noble metal layer and the conductive wiring material are coplanar with the two surfaces of the dielectric material of the intermediate interconnect structure, and the noble metal layer includes a different material than the first liner layer.

    摘要翻译： 提出了半导体器件的线路（BEOL）结构的后端。 在一个实施例中，该结构可以包括设置在中间互连结构上的第一衬里层，所述中间互连结构具有设置在电介质材料的两个表面之间的开口，其中第一衬垫层与至少一部分 下面的互连层的导电布线材料; 至少在所述开口中设置在所述第一衬垫层上的贵金属层; 以及布置在所述贵金属层上的导电布线材料，所述导电布线材料基本上填充所述开口; 其中所述第一衬里层，所述贵金属层和所述导电布线材料与所述中间互连结构的介电材料的两个表面共面，并且所述贵金属层包括与所述第一衬里层不同的材料。

    METHOD FOR FABRICATING BACK END OF THE LINE STRUCTURES WITH LINER AND SEED MATERIALS
    9.
    发明申请
    METHOD FOR FABRICATING BACK END OF THE LINE STRUCTURES WITH LINER AND SEED MATERIALS 失效
    用衬里和种子材料制作线结构的后端的方法

    公开(公告)号：US20080242082A1

    公开(公告)日：2008-10-02

    申请号：US12137875

    申请日：2008-06-12

    申请人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry A. Spooner

    发明人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry A. Spooner

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76846 ,  H01L21/76865

    摘要： A sputter-etching method employed to achieve a thinned down noble metal liner layer deposited on the surface or field of an intermediate back end of the line (BEOL) interconnect structure. The noble metal liner layer is substantially thinned down to a point where the effect of the noble metal has no significant effect in the chemical-mechanical polishing (CMP) process. The noble metal liner layer may be completely removed by sputter etching to facilitate effective planarization by chemical-mechanical polishing to take place.

    摘要翻译： 用于实现沉积在线（BEOL）互连结构的中间后端的表面或场上的减薄的贵金属衬里层的溅射蚀刻方法。 贵金属衬里层基本上变薄到贵金属的作用在化学机械抛光（CMP）工艺中没有显着影响的程度。 可以通过溅射蚀刻完全去除贵金属衬里层，以便通过化学机械抛光发生有效的平坦化。

    METHOD FOR FABRICATING BACK END OF THE LINE STRUCTURES WITH LINER AND SEED MATERIALS
    10.
    发明申请
    METHOD FOR FABRICATING BACK END OF THE LINE STRUCTURES WITH LINER AND SEED MATERIALS 有权
    用衬里和种子材料制作线结构的后端的方法

    公开(公告)号：US20070246792A1

    公开(公告)日：2007-10-25

    申请号：US11380074

    申请日：2006-04-25

    申请人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry Spooner

    发明人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Shom Ponoth ,  Terry Spooner

    IPC分类号： H01L29/00 ,  H01L21/4763

    CPC分类号： H01L21/76846 ,  H01L21/76865

    摘要： A sputter-etching method employed to achieve a thinned down noble metal liner layer deposited on the surface or field of an intermediate back end of the line (BEOL) interconnect structure. The noble metal liner layer is substantially thinned down to a point where the effect of the noble metal has no significant effect in the chemical-mechanical polishing (CMP) process. The noble metal liner layer may be completely removed by sputter etching to facilitate effective planarization by chemical-mechanical polishing to take place.

    摘要翻译： 用于实现沉积在线（BEOL）互连结构的中间后端的表面或场上的减薄的贵金属衬里层的溅射蚀刻方法。 贵金属衬里层基本上变薄到贵金属的作用在化学机械抛光（CMP）工艺中没有显着影响的程度。 可以通过溅射蚀刻完全去除贵金属衬里层，以便通过化学机械抛光发生有效的平坦化。