公开(公告)号：US06389557B1

公开(公告)日：2002-05-14

申请号：US09154077

申请日：1998-09-16

Applicant: Ching Yu ,  Din-I Tsai ,  Jeffrey Dwork ,  Jerry Kuo

Inventor： Ching Yu ,  Din-I Tsai ,  Jeffrey Dwork ,  Jerry Kuo

IPC: H02H305

CPC classification number: G06F11/2236

Abstract: A system for freezing a communication device in a debug mode has a clock control circuit arranged to produce an internal clock signal in response to an external clock signal. When a stop signal is asserted, the internal clock signal is fixed in its off state. As a result, operations of internal registers supplied with the internal clock signal freeze in a chosen state. A scan test may be performed to examine the internal registers in the chosen state. A bypass clock signal is supplied to control the internal clock signal so as to move the internal registers from one state to another. Thus, an event that causes an error may be recreated.

Abstract translation: 用于在调试模式下冻结通信设备的系统具有时钟控制电路，其被布置为响应于外部时钟信号产生内部时钟信号。 当停止信号被置位时，内部时钟信号被固定在其关闭状态。 结果，内部时钟信号提供的内部寄存器的操作在选定状态下冻结。 可以执行扫描测试以检查所选状态下的内部寄存器。 提供旁路时钟信号来控制内部时钟信号，以便将内部寄存器从一个状态移动到另一个状态。 因此，可能会重新创建导致错误的事件。

公开(公告)号：US06526370B1

公开(公告)日：2003-02-25

申请号：US09244416

申请日：1999-02-04

Applicant: Ching Yu ,  Jerry Kuo ,  Jeffrey Dwork ,  John M. Chiang

Inventor： Ching Yu ,  Jerry Kuo ,  Jeffrey Dwork ,  John M. Chiang

IPC: G06F1130

CPC classification number: H04L43/00 ,  G06F11/3409 ,  G06F11/3419 ,  G06F11/3466 ,  G06F11/348 ,  G06F11/349 ,  G06F2201/86 ,  G06F2201/88

Abstract: A system for accumulating data relating to performance parameters of a data communication system is provided in order to determine average values of these parameters. The system comprises multiple registers used for calculating average values of particular performance parameters, such as bus latency, interrupt latency, receive service routine time, and receive frame copy time. Each of the registers contains an event counter and a timer. The event counter increments upon occurrence of an event relating to the performance parameter accumulated by the corresponding register. The timer is activated by the occurrence of the event, and increments at a predetermined rate until the event comes to an end. The timer resumes incrementing when the next event occurs. As a result, the CPU is enabled to determine an average value of a particular parameter per an event relating to this parameter.

Abstract translation: 提供一种用于累积与数据通信系统的性能参数有关的数据的系统，以便确定这些参数的平均值。 该系统包括用于计算特定性能参数的平均值的多个寄存器，例如总线等待时间，中断延迟，接收服务程序时间和接收帧复制时间。 每个寄存器都包含一个事件计数器和一个定时器。 事件计数器在出现与相应寄存器累积的性能参数相关的事件时递增。 定时器由事件的发生激活，并以预定的速率递增直到事件结束。 当下一个事件发生时，定时器恢复递增。 结果，CPU能够确定与该参数相关的事件的特定参数的平均值。

公开(公告)号：US06345345B1

公开(公告)日：2002-02-05

申请号：US09236586

申请日：1999-01-26

Applicant: Ching Yu ,  Jerry Kuo

Inventor： Ching Yu ,  Jerry Kuo

IPC: G06F1314

CPC classification number: G06F13/1605

Abstract: Data communications device and method for arbitrating access to a system memory of the communications device via a peripheral component interconnect (PCI) bus in a network interface having a memory management unit for managing transmit data transfers from the system memory to a transmit buffer memory, and receive data transfers from a receive buffer memory to the system memory. The memory management unit includes an arbitration block having an arbiter state machine, which receives requests for access to the PCI bus in order to provide the transmission and reception of data, descriptors and status information. The arbiter state machine grants the PCI bus access to a request having a higher priority in accordance with a preset priority scheme. The memory management unit has a transmit transfer control register and a receive transfer control register containing programmable values that limit the maximum number of transmit data transfers and receive data transfers allowed within a single PCI bus mastership period. Also, the transmit and receive transfer control registers contain programmable values that limit the number of allowed transmit data transfers within a single PCI bus mastership period when a request for a receive data transfer is asserted, and limit the number of allowed receive data transfers in a PCI bus mastership period when a request for a transmit data transfer is active. The transfer control values in the transmit and receive transfer control registers are dynamically programmed by a host based on data traffic in the PCI bus. Also, the transmit and receive transfer control register values may be preprogrammed based on the network interface application, for example, whether the network interface is used in a network client or network file server.

Abstract translation: 一种数据通信装置和方法，用于通过具有用于管理从系统存储器向发送缓冲存储器的发送数据传送的存储器管理单元的网络接口中经由外围组件互连（PCI）总线仲裁对通信设备的系统存储器的访问的数据通信设备和方法，以及 接收从接收缓冲存储器到系统存储器的数据传输。 存储器管理单元包括具有仲裁器状态机的仲裁块，其接收对PCI总线的访问请求，以便提供数据，描述符和状态信息的发送和接收。 仲裁器状态机根据预设的优先级方案授予PCI总线访问具有较高优先级的请求。 存储器管理单元具有发送传输控制寄存器和接收传送控制寄存器，其包含可限制发送数据传输的最大数量并接收在单个PCI总线主管期内允许的数据传输的可编程值。 此外，发送和接收传输控制寄存器包含可编程值，当有效的接收数据传输请求被断言时，限制在单个PCI总线主管期内允许的发送数据传输的数量，并且限制在 当传输数据传输请求处于活动状态时，PCI总线主管期限。 发送和接收传输控制寄存器中的传输控制值由主机根据PCI总线中的数据流量进行动态编程。 此外，发送和接收转移控制寄存器值可以基于网络接口应用程序进行预编程，例如，网络接口是否用于网络客户端或网络文件服务器。

公开(公告)号：US08380882B2

公开(公告)日：2013-02-19

申请号：US12612078

申请日：2009-11-04

Applicant: Steve L. Pope ,  David J. Riddoch ,  Ching Yu ,  Derek Roberts

Inventor： Steve L. Pope ,  David J. Riddoch ,  Ching Yu ,  Derek Roberts

IPC: G06F15/16

CPC classification number: H04L63/10 ,  H04L47/50 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9031 ,  H04L49/9063

Abstract: Roughly described, a network interface device receiving data packets from a computing device for transmission onto a network, the data packets having a certain characteristic, transmits the packet only if the sending queue has authority to send packets having that characteristic. The data packet characteristics can include transport protocol number, source and destination port numbers, source and destination IP addresses, for example. Authorizations can be programmed into the NIC by a kernel routine upon establishment of the transmit queue, based on the privilege level of the process for which the queue is being established. In this way, a user process can use an untrusted user-level protocol stack to initiate data transmission onto the network, while the NIC protects the remainder of the system or network from certain kinds of compromise.

公开(公告)号：US20110246489A1

公开(公告)日：2011-10-06

申请号：US13162421

申请日：2011-06-16

Applicant: Steve L. Pope ,  Derek Roberts ,  David J. Riddoch ,  Ching Yu ,  John Mingyung Chiang ,  Der-Ren Chu

Inventor： Steve L. Pope ,  Derek Roberts ,  David J. Riddoch ,  Ching Yu ,  John Mingyung Chiang ,  Der-Ren Chu

IPC: G06F17/30

CPC classification number: G06F17/30867 ,  G06F17/30864 ,  H04L45/742 ,  H04L45/745 ,  H04L47/2441 ,  H04L47/621 ,  H04L49/90 ,  H04L67/10 ,  H04L69/16 ,  H04L69/161 ,  H04L69/162 ,  H04L69/163 ,  H04L69/164 ,  H04L69/22 ,  Y10S707/922

Abstract: Roughly described, a network interface device is assigned a maximum extent-of-search. A hash function is applied to the header information of each incoming packet, to generate a hash code for the packet. The hash code designates a particular subset of the table within which the particular header information should be found, and an iterative search is made within that subset. If the search locates a matching entry before the search limit is exceeded, then the incoming data packet is delivered to the receive queue identified in the matching entry. But if the search reaches the search limit before a matching entry is located, then device delivers the packet to a default queue, such as a kernel queue, in the host computer system. The kernel is then responsible for delivering the packet to the correct endpoint.

Abstract translation: 大致描述了网络接口设备被分配最大的搜索范围。 散列函数被应用于每个输入分组的报头信息，以产生分组的哈希码。 哈希代码指定在其中应当找到特定头部信息的表的特定子集，并且在该子集内进行迭代搜索。 如果搜索在超出搜索限制之前找到匹配的条目，则传入数据包将被传递到匹配条目中标识的接收队列。 但是，如果在找到匹配的条目之前搜索达到搜索限制，则设备会将数据包传递到主机系统中的默认队列（如内核队列）。 然后，内核负责将数据包传递到正确的端点。

公开(公告)号：US07634584B2

公开(公告)日：2009-12-15

申请号：US11116018

申请日：2005-04-27

Applicant: Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

Inventor： Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

IPC: G06F15/16

CPC classification number: H04L63/10 ,  H04L47/50 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9031 ,  H04L49/9063

Abstract: Roughly described, a network interface device receiving data packets from a computing device for transmission onto a network, the data packets having a certain characteristic, transmits the packet only if the sending queue has authority to send packets having that characteristic. The data packet characteristics can include transport protocol number, source and destination port numbers, source and destination IP addresses, for example. Authorizations can be programmed into the NIC by a kernel routine upon establishment of the transmit queue, based on the privilege level of the process for which the queue is being established. In this way, a user process can use an untrusted user-level protocol stack to initiate data transmission onto the network, while the NIC protects the remainder of the system or network from certain kinds of compromise.

Abstract translation: 大体上描述了一种从计算设备接收数据包以便传输到网络上的网络接口设备，具有一定特性的数据分组仅在发送队列具有发送具有该特性的分组的权限时发送分组。 数据包特征可以包括传输协议号，源和目的端口号，源和目的IP地址。 基于建立队列的进程的权限级别，可以通过内核例程在建立传输队列时将授权编程到NIC中。 以这种方式，用户进程可以使用不受信任的用户级协议栈来发起到网络上的数据传输，而NIC保护系统或网络的其余部分免受某些种类的折中。

公开(公告)号：US07610413B2

公开(公告)日：2009-10-27

申请号：US11050419

申请日：2005-02-03

Applicant: Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

Inventor： Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

IPC: G09F3/00 ,  G06F3/01

CPC classification number: G06F13/24 ,  G06F13/385 ,  G06F13/4282

Abstract: Method for managing a queue in host memory for use with a peripheral device. Roughly described, the host makes a determination of the availability of space in the queue for writing new entries, in dependence upon historical knowledge of the number of queue entries that the host has authorized the device to write, and the number of entries that the host has consumed. In dependence on that determination, the host authorizes the device to write a limited number of new entries into the queue. The device writes entries into the queue dependence upon the number authorized. The host maintains a read pointer into the queue but does not need to maintain a write pointer, and the peripheral device maintains a write pointer into the queue but does not need to maintain a read pointer.

Abstract translation: 用于管理主机存储器中用于外围设备的队列的方法。 粗略地描述，主机根据主机授权设备写入的队列条目的数量的历史知识以及主机的条目数量来确定队列中用于写入新条目的空间的可用性 已消耗 根据该确定，主机授权设备将有限数量的新条目写入队列。 设备根据授权的数量将条目写入队列。 主机将读指针保留在队列中，但不需要维护写指针，外围设备将写入指针保持在队列中，但不需要维护读指针。

公开(公告)号：US06563790B1

公开(公告)日：2003-05-13

申请号：US09316185

申请日：1999-05-21

Applicant: Ching Yu ,  Bahadir Erimli ,  Jenny Liu Fischer ,  Peter Chow

Inventor： Ching Yu ,  Bahadir Erimli ,  Jenny Liu Fischer ,  Peter Chow

IPC: G01R3108

CPC classification number: H04L47/10 ,  H04L47/26 ,  H04L49/3027 ,  H04L49/351 ,  H04L49/506

Abstract: A network switch having switch ports for communication of data packets with respective computer network nodes according to CSMA/CD protocol that resets a retry counter for counting data packet transmission attempts within any one of the respective switch ports if backpressure is asserted by that port. A retry limit value for the retry counter is modified to ensure that the total number of retrys does not exceed a maximum total number of allowable retrys. The resetting of the retry counter within a port after assertion of backpressure affords the port a greater probability of transmitting earlier under the CSMA/CD protocol, thus more quickly relieving congestion which may occur in the network switch. The modification of the retry limit value ensures that the number of retrys for the port does not exceed industry standards.

Abstract translation: 具有用于根据CSMA / CD协议与数据分组与各个计算机网络节点进行通信的交换机端口的网络交换机，其复位重试计数器，用于如果该端口的背压被断言，则用于计数任何一个相应交换机端口内的数据分组传输尝试。 对重试计数器的重试限制值进行修改，以确保ret​​rys总数不超过允许retrys的最大总数。 在启用背压后，端口内的重试计数器的重新设置使得端口在CSMA / CD协议下较早发送的可能性更大，从而更快地减轻网络交换机中可能发生的拥塞。 重试限制值的修改确保了端口的数量不超过行业标准。

公开(公告)号：US06546010B1

公开(公告)日：2003-04-08

申请号：US09244430

申请日：1999-02-04

Applicant: Shashank C. Merchant ,  Ching Yu ,  Robert Alan Williams

Inventor： Shashank C. Merchant ,  Ching Yu ,  Robert Alan Williams

IPC: H04L1228

CPC classification number: H04L49/253 ,  H04L49/15 ,  H04L49/1553 ,  H04L49/20 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/3054 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/45

Abstract: Network switch modules are cascaded in a prescribed sequence to support higher port requirements. The network switch modules may circulate a received frame indefinitely if the frame is not destined for any one of the output ports of the cascaded arrangement of network switch modules. Frame forwarding logic within each of the cascaded network switch modules is employed to determine when a network switch module should cease forwarding the received frame. Specifically, the frame forwarding logic takes the frame out of circulation based upon the sequence identifier of the network switch module and an embedded identifier associated with the frame.

Abstract translation: 网络交换机模块按规定的顺序级联以支持更高端口要求。 网络交换机模块可以无限期地循环接收的帧，如果该帧不是用于网络交换机模块的级联布置的任何一个输出端口。 采用每个级联网络交换机模块内的帧转发逻辑来确定网络交换机模块何时应停止转发所接收的帧。 具体地，帧转发逻辑基于网络交换模块的序列标识符和与该帧相关联的嵌入标识符，使帧不在流行中。

公开(公告)号：US06529503B1

公开(公告)日：2003-03-04

申请号：US09315970

申请日：1999-05-21

Applicant: John Chiang ,  Ching Yu

Inventor： John Chiang ,  Ching Yu

IPC: H04L1256

CPC classification number: H04L49/3054 ,  H04L49/254 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/45

Abstract: A network switch configured for switching data packets across multiple ports uses an external memory to store data frames. A scheduler controls access to the external memory based on predetermined arbitration logic. When a data frame is transmitted to the external memory, a portion of the data frame is stored on the switch for processing by decision making logic to generate frame forwarding information. The data frame is then transmitted back to the switch for transmission through the appropriate port(s) on the switch.

Abstract translation: 配置为跨多个端口切换数据包的网络交换机使用外部存储器来存储数据帧。 调度器基于预定的仲裁逻辑控制对外部存储器的访问。 当将数据帧发送到外部存储器时，数据帧的一部分被存储在交换机上，由决策逻辑进行处理以产生帧转发信息。 然后将数据帧发送回交换机，以通过交换机上的相应端口进行传输。