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    Method of manufacturing transistor that utilizes current direction limiting units between phase change layer and bit lines and between phase change layer and word lines
    1.
    发明授权
    Method of manufacturing transistor that utilizes current direction limiting units between phase change layer and bit lines and between phase change layer and word lines 失效
    制造晶体管的方法，其利用相变层和位线之间以及相变层和字线之间的电流方向限制单元

    公开(公告)号：US07638361B2

    公开(公告)日：2009-12-29

    申请号：US12216742

    申请日：2008-07-10

    申请人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    发明人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    IPC分类号： H01L21/8239

    CPC分类号： H01L29/685

    摘要： A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

    摘要翻译： 提供其通道的物理特性根据施加的电压而改变的晶体管，并且提供其制造和操作方法。 晶体管可以包括基板上的第一导电层，相继层叠在第一导电层上的相变层和第二导电层，形成在第二导电层上的第一电流方向限制单元和第二电流方向限制单元 通过在空间内分离，分别形成在第一电流方向限制单元和第二电流方向限制单元上的第三导电层和第四导电层，连接到第三导电层的字线，连接到第三导电层的位线 第四导电层和连接到字线的降压单元。

    Transistor and method of operating transistor
    2.
    发明授权
    Transistor and method of operating transistor 失效
    晶体管及晶体管工作方式

    公开(公告)号：US07414295B2

    公开(公告)日：2008-08-19

    申请号：US11274475

    申请日：2005-11-16

    申请人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    发明人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    IPC分类号： H01L29/8605 ,  G11C11/00

    CPC分类号： H01L29/685

    摘要： A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

    摘要翻译： 提供其通道的物理特性根据施加的电压而改变的晶体管，并且提供其制造和操作方法。 晶体管可以包括基板上的第一导电层，相继层叠在第一导电层上的相变层和第二导电层，形成在第二导电层上的第一电流方向限制单元和第二电流方向限制单元 通过在空间内分离，分别形成在第一电流方向限制单元和第二电流方向限制单元上的第三导电层和第四导电层，连接到第三导电层的字线，连接到第三导电层的位线 第四导电层和连接到字线的降压单元。

    Transistor, method of manufacturing transistor, and method of operating transistor
    3.
    发明申请
    Transistor, method of manufacturing transistor, and method of operating transistor 失效

    公开(公告)号：US20060108639A1

    公开(公告)日：2006-05-25

    申请号：US11274475

    申请日：2005-11-16

    申请人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    发明人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    IPC分类号： H01L29/94 ,  H01L29/76

    CPC分类号： H01L29/685

    摘要： A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

    Transistor, method of manufacturing transistor, and method of operating transistor
    4.
    发明申请
    Transistor, method of manufacturing transistor, and method of operating transistor 失效
    晶体管，晶体管的制造方法以及晶体管的工作方法

    公开(公告)号：US20090186444A1

    公开(公告)日：2009-07-23

    申请号：US12216742

    申请日：2008-07-10

    申请人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    发明人： Choong-Rae Cho ,  In-Kyeong Yoo ,  Myoung-Jae Lee

    IPC分类号： H01L21/20

    CPC分类号： H01L29/685

    摘要： A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

    摘要翻译： 提供其通道的物理特性根据施加的电压而改变的晶体管，并且提供其制造和操作方法。 晶体管可以包括基板上的第一导电层，相继层叠在第一导电层上的相变层和第二导电层，形成在第二导电层上的第一电流方向限制单元和第二电流方向限制单元 通过在空间内分离，分别形成在第一电流方向限制单元和第二电流方向限制单元上的第三导电层和第四导电层，连接到第三导电层的字线，连接到第三导电层的位线 第四导电层和连接到字线的降压单元。