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公开(公告)号:US20140262707A1
公开(公告)日:2014-09-18
申请号:US13996507
申请日:2013-03-14
申请人: Chytra Pawashe , Kevin Lin , Anurag Chaudhry , Raseong Kim , Seiyon Kim , Kelin Kuhn , Sasikanth Manipatruni , Rafael Rios , Ian A. Young
发明人: Chytra Pawashe , Kevin Lin , Anurag Chaudhry , Raseong Kim , Seiyon Kim , Kelin Kuhn , Sasikanth Manipatruni , Rafael Rios , Ian A. Young
IPC分类号: H01H59/00
CPC分类号: H01L29/84 , B82Y10/00 , H01H1/0094 , H01H9/0271 , H01H59/0009 , H01L29/045 , H01L29/0673 , H01L29/161
摘要: Nanowire-based mechanical switching devices are described. For example, a nanowire relay includes a nanowire disposed in a void disposed above a substrate. The nanowire has an anchored portion and a suspended portion. A first gate electrode is disposed adjacent the void, and is spaced apart from the nanowire. A first conductive region is disposed adjacent the first gate electrode and adjacent the void, and is spaced apart from the nanowire.
摘要翻译: 描述了基于纳米线的机械开关装置。 例如,纳米线继电器包括布置在衬底上方的空隙中的纳米线。 纳米线具有锚固部分和悬挂部分。 第一栅电极邻近空隙设置,并与纳米线隔开。 第一导电区域邻近第一栅电极设置并邻近空隙,并与纳米线隔开。
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公开(公告)号:US20160329438A1
公开(公告)日:2016-11-10
申请号:US15151381
申请日:2016-05-10
申请人: Chytra Pawashe , Kevin Lin , Anurag Chaudhry , Raseong Kim , Seiyon Kim , Kelin Kuhn , Sasikanth Manipatruni , Rafael Rios , Ian A. Young
发明人: Chytra Pawashe , Kevin Lin , Anurag Chaudhry , Raseong Kim , Seiyon Kim , Kelin Kuhn , Sasikanth Manipatruni , Rafael Rios , Ian A. Young
IPC分类号: H01L29/84 , H01H59/00 , H01L29/161 , H01L29/06 , H01L29/04
CPC分类号: H01L29/84 , B82Y10/00 , H01H1/0094 , H01H9/0271 , H01H59/0009 , H01L29/045 , H01L29/0673 , H01L29/161
摘要: Nanowire-based mechanical switching devices are described. For example, a nanowire relay includes a nanowire disposed in a void disposed above a substrate. The nanowire has an anchored portion and a suspended portion. A first gate electrode is disposed adjacent the void, and is spaced apart from the nanowire. A first conductive region is disposed adjacent the first gate electrode and adjacent the void, and is spaced apart from the nanowire.
摘要翻译: 描述了基于纳米线的机械开关装置。 例如,纳米线继电器包括布置在衬底上方的空隙中的纳米线。 纳米线具有锚固部分和悬挂部分。 第一栅电极邻近空隙设置,并与纳米线隔开。 第一导电区域邻近第一栅电极设置并邻近空隙,并与纳米线隔开。
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公开(公告)号:US09362074B2
公开(公告)日:2016-06-07
申请号:US13996507
申请日:2013-03-14
申请人: Chytra Pawashe , Kevin Lin , Anurag Chaudhry , Raseong Kim , Seiyon Kim , Kelin Kuhn , Sasikanth Manipatruni , Rafael Rios , Ian A. Young
发明人: Chytra Pawashe , Kevin Lin , Anurag Chaudhry , Raseong Kim , Seiyon Kim , Kelin Kuhn , Sasikanth Manipatruni , Rafael Rios , Ian A. Young
CPC分类号: H01L29/84 , B82Y10/00 , H01H1/0094 , H01H9/0271 , H01H59/0009 , H01L29/045 , H01L29/0673 , H01L29/161
摘要: Nanowire-based mechanical switching devices are described. For example, a nanowire relay includes a nanowire disposed in a void disposed above a substrate. The nanowire has an anchored portion and a suspended portion. A first gate electrode is disposed adjacent the void, and is spaced apart from the nanowire. A first conductive region is disposed adjacent the first gate electrode and adjacent the void, and is spaced apart from the nanowire.
摘要翻译: 描述了基于纳米线的机械开关装置。 例如,纳米线继电器包括布置在衬底上方的空隙中的纳米线。 纳米线具有锚固部分和悬挂部分。 第一栅电极邻近空隙设置,并与纳米线隔开。 第一导电区域邻近第一栅电极设置并邻近空隙,并与纳米线隔开。
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公开(公告)号:US20140264253A1
公开(公告)日:2014-09-18
申请号:US13996845
申请日:2013-03-14
申请人: Seiyon Kim , Kelin Kuhn , Rafael Rios , Mark Armstrong
发明人: Seiyon Kim , Kelin Kuhn , Rafael Rios , Mark Armstrong
IPC分类号: H01L29/06 , H01L29/66 , H01L29/786 , H01L21/266 , H01L29/10 , H01L21/265
CPC分类号: H01L29/0673 , H01L29/16 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/785 , H01L29/78696
摘要: A nanowire device of the present description may include a highly doped underlayer formed between at least one nanowire transistor and the microelectronic substrate on which the nanowire transistors are formed, wherein the highly doped underlayer may reduce or substantially eliminate leakage and high gate capacitance which can occur at a bottom portion of a gate structure of the nanowire transistors. As the formation of the highly doped underlayer may result in gate inducted drain leakage at an interface between source structures and drain structures of the nanowire transistors, a thin layer of undoped or low doped material may be formed between the highly doped underlayer and the nanowire transistors.
摘要翻译: 本描述的纳米线器件可以包括形成在至少一个纳米线晶体管和其上形成纳米线晶体管的微电子衬底之间的高度掺杂的底层,其中高度掺杂的底层可以减少或基本上消除可能发生的泄漏和高栅极电容 在纳米线晶体管的栅极结构的底部。 由于高掺杂底层的形成可能导致在纳米线晶体管的源极结构和漏极结构之间的界面处的栅极感应漏极泄漏,可以在高掺杂底层和纳米线晶体管之间形成未掺杂或低掺杂材料的薄层 。
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公开(公告)号:US20140264280A1
公开(公告)日:2014-09-18
申请号:US13996848
申请日:2013-03-15
申请人: Seiyon Kim , Daniel Aubertine , Kelin Kuhn , Anand Murthy
发明人: Seiyon Kim , Daniel Aubertine , Kelin Kuhn , Anand Murthy
IPC分类号: H01L29/06 , H01L29/66 , H01L29/775 , H01L29/78
CPC分类号: H01L29/66795 , H01L29/0673 , H01L29/1037 , H01L29/42392 , H01L29/66439 , H01L29/66545 , H01L29/6656 , H01L29/6681 , H01L29/66818 , H01L29/775 , H01L29/785 , H01L29/78696
摘要: A nanowire device of the present description may be produced with the incorporation of at least one underlayer etch stop formed during the fabrication of at least one nanowire transistor in order to assist in protecting source structures and/or drain structures from damage that may result from fabrication processes. The underlayer etch stop may prevent damage to the source structures andor drain the structures, when the material used in the fabrication of the source structures andor the drain structures is susceptible to being etched by the processes used in the removal of the sacrificial materials, i.e. low selectively to the source structure and/or the drain structure materials, such that potential shorting between the transistor gate electrodes and contacts formed for the source structures andor the drain structures may be prevented.
摘要翻译: 本描述的纳米线器件可以通过结合在制造至少一个纳米线晶体管期间形成的至少一个底层蚀刻停止来产生,以便有助于保护源结构和/或漏极结构免受可能由制造产生的损伤 过程。 当用于制造源结构的材料和漏极结构易于被用于去除牺牲材料的工艺被蚀刻时,底层蚀刻停止件可以防止对源结构的损坏和排出结构,即低 选择性地连接到源极结构和/或漏极结构材料,使得可以防止晶体管栅电极和为源结构形成的触点之间的电位短路以及漏极结构。
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公开(公告)号:US09064944B2
公开(公告)日:2015-06-23
申请号:US13996848
申请日:2013-03-15
申请人: Seiyon Kim , Daniel Aubertine , Kelin Kuhn , Anand Murthy
发明人: Seiyon Kim , Daniel Aubertine , Kelin Kuhn , Anand Murthy
IPC分类号: H01L29/06 , H01L29/775 , H01L29/78 , H01L29/66
CPC分类号: H01L29/66795 , H01L29/0673 , H01L29/1037 , H01L29/42392 , H01L29/66439 , H01L29/66545 , H01L29/6656 , H01L29/6681 , H01L29/66818 , H01L29/775 , H01L29/785 , H01L29/78696
摘要: A nanowire device of the present description may be produced with the incorporation of at least one underlayer etch stop formed during the fabrication of at least one nanowire transistor in order to assist in protecting source structures and/or drain structures from damage that may result from fabrication processes. The underlayer etch stop may prevent damage to the source structures and/or drain the structures, when the material used in the fabrication of the source structures and/or the drain structures is susceptible to being etched by the processes used in the removal of the sacrificial materials, i.e. low selectively to the source structure and/or the drain structure materials, such that potential shorting between the transistor gate electrodes and contacts formed for the source structures and/or the drain structures may be prevented.
摘要翻译: 本描述的纳米线器件可以通过结合在制造至少一个纳米线晶体管期间形成的至少一个底层蚀刻停止来产生,以便有助于保护源结构和/或漏极结构免受可能由制造产生的损伤 过程。 当在源结构和/或漏极结构的制造中使用的材料易于被用于去除牺牲物的过程被蚀刻时,底层蚀刻停止件可以防止对源结构的损坏和/或排出结构 材料,即选择性地低至源极结构和/或漏极结构材料,使得可以防止晶体管栅电极和为源极结构和/或漏极结构形成的触点之间的电位短路。
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公开(公告)号:US20160086951A1
公开(公告)日:2016-03-24
申请号:US14948083
申请日:2015-11-20
申请人: Seiyon Kim , Kelin J. Kuhn , Tahir Ghani , Anand S. Murthy , Annalisa Cappellani , Stephen M. Cea , Rafael Rios , Glenn A. Glass
发明人: Seiyon Kim , Kelin J. Kuhn , Tahir Ghani , Anand S. Murthy , Annalisa Cappellani , Stephen M. Cea , Rafael Rios , Glenn A. Glass
IPC分类号: H01L27/092 , H01L21/8238 , H01L29/423 , H01L29/06 , H01L29/10
CPC分类号: H01L21/823821 , B82Y10/00 , H01L21/8238 , H01L21/823807 , H01L21/823828 , H01L21/84 , H01L21/845 , H01L27/092 , H01L27/0924 , H01L27/12 , H01L27/1203 , H01L27/1211 , H01L29/0673 , H01L29/0676 , H01L29/1033 , H01L29/42356 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/7853
摘要: Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.
摘要翻译: 描述了免费的金属氧化物半导体纳米线结构。 例如,半导体结构包括第一半导体器件。 第一半导体器件包括设置在衬底之上的第一纳米线。 第一纳米线具有在衬底上方的第一距离的中点,并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一栅极电极堆叠完全包围第一纳米线的离散通道区域。 半导体结构还包括第二半导体器件。 第二半导体器件包括设置在衬底上方的第二纳米线。 第二纳米线在衬底上方具有第二距离的中点,并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一距离与第二距离不同。 第二栅极电极堆叠完全围绕第二纳米线的离散通道区域。
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公开(公告)号:US08753942B2
公开(公告)日:2014-06-17
申请号:US12958179
申请日:2010-12-01
申请人: Kelin J. Kuhn , Seiyon Kim , Rafael Rios , Stephen M. Cea , Martin D. Giles , Annalisa Cappellani , Titash Rakshit , Peter Chang , Willy Rachmady
发明人: Kelin J. Kuhn , Seiyon Kim , Rafael Rios , Stephen M. Cea , Martin D. Giles , Annalisa Cappellani , Titash Rakshit , Peter Chang , Willy Rachmady
IPC分类号: H01L29/775 , H01L29/66 , H01L21/336 , H01L21/762 , H01L29/772 , B82Y40/00
CPC分类号: H01L29/0673 , B82Y10/00 , H01L21/76224 , H01L27/0922 , H01L27/1203 , H01L29/0676 , H01L29/1033 , H01L29/16 , H01L29/165 , H01L29/41733 , H01L29/42392 , H01L29/66439 , H01L29/66742 , H01L29/66795 , H01L29/775 , H01L29/7848 , H01L29/785 , H01L29/78618 , H01L29/78654 , H01L29/78684 , H01L29/78696
摘要: Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.
摘要翻译: 描述形成微电子结构的方法。 这些方法的实施例包括形成纳米线装置,其包括基板,该基板包括与间隔物相邻的源极/漏极结构,以及设置在间隔物之间的纳米线通道结构,其中纳米线通道结构在彼此之上垂直堆叠。
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公开(公告)号:US20120138886A1
公开(公告)日:2012-06-07
申请号:US12958179
申请日:2010-12-01
申请人: Kelin J. Kuhn , Seiyon Kim , Rafael Rios , Stephen M. Cea , Martin D. Giles , Annalisa Cappellani , Titash Rakshit , Peter Chang , Willy Rachmady
发明人: Kelin J. Kuhn , Seiyon Kim , Rafael Rios , Stephen M. Cea , Martin D. Giles , Annalisa Cappellani , Titash Rakshit , Peter Chang , Willy Rachmady
IPC分类号: H01L29/775 , H01L29/66 , H01L21/336 , H01L21/762 , B82Y40/00 , H01L29/772
CPC分类号: H01L29/0673 , B82Y10/00 , H01L21/76224 , H01L27/0922 , H01L27/1203 , H01L29/0676 , H01L29/1033 , H01L29/16 , H01L29/165 , H01L29/41733 , H01L29/42392 , H01L29/66439 , H01L29/66742 , H01L29/66795 , H01L29/775 , H01L29/7848 , H01L29/785 , H01L29/78618 , H01L29/78654 , H01L29/78684 , H01L29/78696
摘要: Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.
摘要翻译: 描述形成微电子结构的方法。 这些方法的实施例包括形成纳米线装置,其包括基板,该基板包括与间隔物相邻的源极/漏极结构,以及设置在间隔物之间的纳米线通道结构,其中纳米线通道结构在彼此之上垂直堆叠。
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公开(公告)号:US10424580B2
公开(公告)日:2019-09-24
申请号:US13996505
申请日:2011-12-23
申请人: Annalisa Cappellani , Kelin J. Kuhn , Rafael Rios , Gopinath Bhimarasetti , Tahir Ghani , Seiyon Kim
发明人: Annalisa Cappellani , Kelin J. Kuhn , Rafael Rios , Gopinath Bhimarasetti , Tahir Ghani , Seiyon Kim
IPC分类号: H01L29/775 , H01L21/02 , H01L27/088 , B82Y10/00 , B82Y40/00 , H01L29/66 , H01L29/06 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/16 , B82Y99/00
摘要: Semiconductor devices having modulated nanowire counts and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a plurality of nanowires disposed above a substrate and stacked in a first vertical plane with a first uppermost nanowire. A second semiconductor device has one or more nanowires disposed above the substrate and stacked in a second vertical plane with a second uppermost nanowire. The second semiconductor device includes one or more fewer nanowires than the first semiconductor device. The first and second uppermost nanowires are disposed in a same plane orthogonal to the first and second vertical planes.
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