公开(公告)号：US06723579B2

公开(公告)日：2004-04-20

申请号：US10194392

申请日：2002-07-12

申请人： Colin Stephen Gormley ,  Stephen Alan Brown ,  Scott Carlton Blackstone

发明人： Colin Stephen Gormley ,  Stephen Alan Brown ,  Scott Carlton Blackstone

IPC分类号： H01L2100

CPC分类号： G02B26/0841 ,  B81B2201/042 ,  B81C1/00357 ,  B81C2201/019

摘要： A semiconductor wafer having a matrix array of micro-mirrors comprises a component substrate carried on a base substrate. The component substrate comprises a membrane layer in which the micro-mirrors are formed and a supporting handle layer. The base substrate comprises a base layer from which a plurality of pedestals extend upwardly therefrom into cavities in the handle layer corresponding to the micro-mirrors. Each pedestal carries electrodes for co-operating with the micro-mirrors for tilting thereof. Conductors through vias in the pedestals connect the electrodes to electrically conductive tracks on a bottom surface, and in turn through conductors through vias to addressing terminals for addressing the electrodes. By forming the pedestals in the base substrate and projecting the pedestals into the cavities in the handle layer the handle layer is recessed into the base substrate thereby facilitating the provision of a handle layer of depth sufficient for adequately supporting the membrane layer during fabrication of the wafer.

摘要翻译： 具有微镜的矩阵阵列的半导体晶片包括承载在基底衬底上的部件衬底。 部件基板包括其中形成有微反射镜的膜层和支撑手柄层。 基底基底包括基底层，多个基座从该基底向上延伸到基部层中，该底座层与对应于微反射镜的手柄层中的空腔中延伸。 每个基座承载用于与微反射镜配合的电极以使其倾斜。 通过基座中的通孔的导体将电极连接到底表面上的导电轨道，并且继而通过导体穿过通孔到用于寻址电极的寻址端子。 通过在基底基板中形成基座并将基座突出到手柄层中的空腔中，手柄层凹陷到基底基底中，从而便于在晶片制造期间提供足以充分支撑膜层的深度的手柄层 。

公开(公告)号：US07045869B2

公开(公告)日：2006-05-16

申请号：US10786426

申请日：2004-02-25

申请人： Colin Stephen Gormley ,  Stephen Alan Brown ,  Scott Carlton Blackstone

发明人： Colin Stephen Gormley ,  Stephen Alan Brown ,  Scott Carlton Blackstone

IPC分类号： H01L27/14

CPC分类号： G02B26/0841 ,  B81B2201/042 ,  B81C1/00357 ,  B81C2201/019

摘要： A semiconductor wafer having a matrix array of micro-mirrors comprises a component substrate carried on a base substrate. The component substrate comprises a membrane layer in which the micro-mirrors are formed and a supporting handle layer. The base substrate comprises a base layer from which a plurality of pedestals extend upwardly therefrom into cavities in the handle layer corresponding to the micro-mirrors. Each pedestal carries electrodes for co-operating with the micro-mirrors for tilting thereof. Conductors through vias in the pedestals connect the electrodes to electrically conductive tracks on a bottom surface, and in turn through conductors through vias to addressing terminals for addressing the electrodes. By forming the pedestals in the base substrate and projecting the pedestals into the cavities in the handle layer the handle layer is recessed into the base substrate thereby facilitating the provision of a handle layer of depth sufficient for adequately supporting the membrane layer during fabrication of the wafer.

摘要翻译： 具有微镜的矩阵阵列的半导体晶片包括承载在基底衬底上的部件衬底。 部件基板包括其中形成微反射镜的膜层和支撑手柄层。 基底基底包括基底层，多个基座从该基底向上延伸到基部层中，该底座层与对应于微反射镜的手柄层中的空腔中延伸。 每个基座承载用于与微反射镜配合的电极以使其倾斜。 通过基座中的通孔的导体将电极连接到底表面上的导电轨道，并且继而通过导体穿过通孔到用于寻址电极的寻址端子。 通过在基底基板中形成基座并将基座突出到手柄层中的空腔中，手柄层凹陷到基底基底中，从而便于在晶片制造期间提供足以充分支撑膜层的深度的手柄层 。

公开(公告)号：US06797591B1

公开(公告)日：2004-09-28

申请号：US09661766

申请日：2000-09-14

申请人： Colin Stephen Gormley ,  Stephen Alan Brown ,  Scott Carlton Blackstone

发明人： Colin Stephen Gormley ,  Stephen Alan Brown ,  Scott Carlton Blackstone

IPC分类号： H01L2146

CPC分类号： H01L21/3213 ,  G02B26/0833 ,  H01L21/311

摘要： A method for forming a multi-layer semiconductor device (1) having a lower silicon layer (4), an intermediate silicon layer (5) within which micro-mirrors (10) are formed and an upper spacer layer (6) of silicon for spacing another component from the micro-mirrors (10). First and second etch stop layers (8,9) of oxide act as insulation between the respective layers (4,5,6). In order to minimize damage to the micro-mirrors (10), the formation of the micro-mirrors (10) is left to the end of the forming process. An assembly of the lower layer (4) and the intermediate layer (5) with the first etch stop layer (8) is formed, and the second etch stop layer (9) is then grown and patterned on the intermediate layer (5) for subsequent formation of the micro-mirrors (10). The upper layer (5) is then bonded by an annealing process to the patterned second etch stop layer (9). After the formation of communicating bores (30) in the lower layer (4) and thinning of the first etch stop layer (8) adjacent the micro-mirrors (10) through the communicating bores (30), openings (16) in the upper layer (6) and the micro-mirrors (10) are sequentially formed by reactive ion etching through the upper layer (6). Portions of the first and second etch stop layers (8,9) adjacent the micro-mirrors (10) are then etched away.

摘要翻译： 一种用于形成具有下硅层（4）的多层半导体器件（1），形成有微镜（10）的中间硅层（5）和用于硅的上间隔层（6）的多层半导体器件（1）的方法， 将另一组件与微反射镜（10）间隔开。 氧化物的第一和第二蚀刻停止层（8,9）用作各层（4,5,6）之间的绝缘体。 为了最小化对微反射镜（10）的损伤，微反射镜（10）的形成留在成型过程的结束。 形成具有第一蚀刻停止层（8）的下层（4）和中间层（5）的组件，然后在中间层（5）上生长并图案化第二蚀刻停止层（9），用于 随后形成微镜（10）。 然后通过退火工艺将上层（5）结合到图案化的第二蚀刻停止层（9）上。 在下层（4）中形成连通孔（30）并且通过连通孔（30）使靠近微反射镜（10）的第一蚀刻停止层（8）变薄，上部的开口（16） 层（6）和微反射镜（10）通过上层（6）的反应离子蚀刻顺序地形成。 然后将与微反射镜（10）相邻的第一和第二蚀刻停止层（8,9）的部分蚀刻掉。

公开(公告)号：US06818564B1

公开(公告)日：2004-11-16

申请号：US10324603

申请日：2002-12-20

申请人： Colin Stephen Gormley

发明人： Colin Stephen Gormley

IPC分类号： H01L21302

CPC分类号： B81C1/00103 ,  B81B2203/0353 ,  B81C2201/0112 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3086

摘要： A semiconductor wafer comprises an SOI comprising a device layer on an oxide layer supported on a handle layer. Micro-mirrors are formed in the device layer, and access bores extend through the handle layer and the oxide layer to the micro-mirrors for accommodating optical fibers to the micro-mirrors. The access bores are accurately aligned with the micro-mirrors, and the access bores are accurately formed of circular cross-section. Each access bore comprises a tapered lead-in portion extending to a parallel portion. The diameter of the parallel portion is selected so that the optical fibers are a tight fit therein for securing the optical fibers in alignment with the micro-mirrors. The tapered lead-in portions of the access bores are formed to a first depth by a first dry isotropic etch for accurately forming the taper and the circular cross-section of the tapered lead-in portions. The parallel portions are formed from the first depth to a second face of the handle layer by a second dry etch, namely, an anisotropic etch carried out using the Bosch process. By so etching the access bores the access bores are accurately formed of circular transverse cross-section and of accurate dimensions.

摘要翻译： 半导体晶片包括SOI，其包括在手柄层上的氧化物层上的器件层。 微镜形成在器件层中，并且进入孔通过手柄层和氧化物层延伸到微反射镜，以将光纤容纳到微镜。 进入孔与微反射镜精确对准，并且进入孔精确地由圆形横截面形成。 每个通孔包括延伸到平行部分的锥形引入部分。 选择平行部分的直径，使得光纤紧密配合在其中以固定光学微镜与微反射镜对准。 进入孔的锥形引入部分通过第一干燥各向同性蚀刻形成第一深度，用于精确地形成锥形导入部分的锥形和圆形横截面。 平行部分通过第二干蚀刻即使用Bosch工艺进行的各向异性蚀刻从手柄层的第一深度到第二面形成。 通过这样蚀刻通路孔，准确地形成通孔，其圆形横截面和准确的尺寸。

公开(公告)号：US07041528B2

公开(公告)日：2006-05-09

申请号：US10617427

申请日：2003-07-11

申请人： Colin Stephen Gormley ,  Scott Jong Ho Limb

发明人： Colin Stephen Gormley ,  Scott Jong Ho Limb

IPC分类号： H01L21/00 ,  G02B26/00

CPC分类号： G02B26/0833

摘要： A method for producing a semiconductor wafer (1) with one or more micro-mirrors (5) formed in a membrane layer (2) which is supported on a handle layer (3) with a buried oxide layer (6) between the membrane and handle layers (2,3) which avoids rupturing of tethers (7) which support the micro-mirrors (5) in the membrane layer (2) and also avoids bowing of the micro-mirrors (5). After trenches (14) are formed in the membrane layer (2) for defining the micro-mirrors (5) and the tethers (7), and prior to forming of through bores (9) through the handle layer (3) to the micro-mirrors (5), a support layer (20) of oxide is deposited on the exposed surface (12) of the membrane layer (2) over the micro-mirrors (5) and the tethers (7) and is back filled into the trenches (14) for supporting bridging portions (16) of the buried oxide layer (6). The buried oxide layer (6) acts as an etch stop layer for the through bores (9), and stresses which are induced in exposed portions (19) of the buried oxide layer (6) exposed by the through bores (9) during etching of the through bores (9) are counteracted by the support layer (20) which prevents rupturing of the bridging portions (16), thereby preventing rupturing of the tethers (7). By counteracting the stresses induced in the exposed portions (19) of the buried oxide layer (6) bowing of the exposed portions (19) is avoided and thus bowing of the micro-mirrors (5) is also avoided.

摘要翻译： 一种用于制造半导体晶片（1）的方法，所述半导体晶片（1）具有形成在膜层（2）中的一个或多个微反射镜（5），所述膜层（2）被支撑在手柄层（3）上，所述掩模氧化物层（6） 手柄层（2,3），其避免支撑膜层（2）中的微反射镜（5）的系绳（7）的破裂，并且还避免微镜（5）的弯曲。 在用于限定微反射镜（5）和系绳（7）的膜层（2）中形成沟槽（14）之后，并且在通过手柄层（3）形成通孔（9）之前， - 反射镜（5），氧化物的支撑层（20）沉积在微透镜（5）和系绳（7）上的膜层（2）的暴露表面（12）上，并被填充到 用于支撑掩埋氧化物层（6）的桥接部分（16）的沟槽（14）。 掩埋氧化物层（6）用作通孔（9）的蚀刻停止层，以及在蚀刻期间由通孔（9）暴露的掩埋氧化物层（6）的暴露部分（19）中诱发的应力 的通孔（9）被支撑层（20）抵消，防止桥接部分（16）的断裂，从而防止系绳（7）的破裂。 通过抵消在暴露部分（19）弯曲的掩埋氧化物层（6）的暴露部分（19）中所引起的应力，避免了微反射镜（5）的弯曲。

公开(公告)号：US07531842B2

公开(公告)日：2009-05-12

申请号：US10971849

申请日：2004-10-22

申请人： Colin Stephen Gormley

发明人： Colin Stephen Gormley

IPC分类号： H01L27/15

CPC分类号： H01L21/3065 ,  H01L21/30655 ,  H01L21/3086

摘要： A semiconductor wafer comprises an SOI comprising a device layer on an oxide layer supported on a handle layer. Micro-mirrors are formed in the device layer, and access bores extend through the handle layer and the oxide layer to the micro-mirrors for accommodating optical fibers to the micro-mirrors. The access bores are accurately aligned with the micro-mirrors, and the access bores are accurately formed of circular cross-section. Each access bore comprises a tapered lead-in portion extending to a parallel portion. The diameter of the parallel portion is selected so that the optical fibers are a tight fit therein for securing the optical fibers in alignment with the micro-mirrors. The tapered lead-in portions of the access bores are formed to a first depth by a first dry isotropic etch for accurately forming the taper and the circular cross-section of the tapered lead-in portions. The parallel portions are formed from the first depth to a second face of the handle layer by a second dry etch, namely, an anisotropic etch carried out using the Bosch process. By so etching the access bores the access bores are accurately formed of circular transverse cross-section and of accurate dimensions.

摘要翻译： 半导体晶片包括SOI，其包括在手柄层上的氧化物层上的器件层。 微镜形成在器件层中，并且进入孔通过手柄层和氧化物层延伸到微反射镜，以将光纤容纳到微镜。 进入孔与微反射镜精确对准，并且进入孔精确地由圆形横截面形成。 每个通孔包括延伸到平行部分的锥形引入部分。 选择平行部分的直径，使得光纤紧密配合在其中以固定光学微镜与微反射镜对准。 进入孔的锥形引入部分通过第一干燥各向同性蚀刻形成第一深度，用于精确地形成锥形导入部分的锥形和圆形横截面。 平行部分通过第二干蚀刻即使用Bosch工艺进行的各向异性蚀刻从手柄层的第一深度到第二面形成。 通过这样蚀刻通路孔，准确地形成通孔，其圆形横截面和准确的尺寸。

公开(公告)号：US07122416B2

公开(公告)日：2006-10-17

申请号：US10699503

申请日：2003-10-31

申请人： William Andrew Nevin ,  Colin Stephen Gormley

发明人： William Andrew Nevin ,  Colin Stephen Gormley

IPC分类号： H01L21/8238 ,  H01L29/00

CPC分类号： H01L21/76283 ,  H01L21/76232 ,  H01L21/76286

摘要： A method for forming an isolation filled trench (25) in a silicon layer (21) of an SOI structure (20). The trench (25) is relieved adjacent its open mouth (30) in order to displace the commencement of bridging of the trench (25) with the filling material, to a level (36) well below a first surface (27) of the silicon layer (21) for in turn displacing voids (35) from the open mouth (30) into the trench (25) below the level (36). The trench may be relieved by forming tapered portions (40) in the side wells (29) adjacent the open mouth (30), and/or by relieving one or more lining layers (32) in the trench (25) adjacent the open mouth (30) to form tapered portion (52) and (53). Instead of relieving the trench (25) by tapering the side walls (29) relieving recesses may be formed into the first surface (27) of the silicon layer (21) adjacent the open mouth (30). By relieving the trench (25) or one or more of the lining layers (32) adjacent the open mouth (30) the commencement of bridging of the trench with the filling material is displaced downwardly to a level (36), which displaces voids formed in the trench below the level (36). By sufficiently relieving the trench (25) and/or lining layers (32) adjacent the open mouth to a sufficient depth the formation of voids in the trench may be completely avoided.

摘要翻译： 一种用于在SOI结构（20）的硅层（21）中形成隔离填充沟槽（25）的方法。 沟槽（25）在其开口（30）附近被释放，以便将沟槽（25）与填充材料的桥接开始移动到远低于硅的第一表面（27）的水平面（36） 层（21）又将空隙（35）从开口（30）移动到水平面（36）下方的沟槽（25）内。 通过在邻近开口（30）的侧孔（29）中形成锥形部分（40），和/或通过在邻近开口处的沟槽（25）中释放一个或多个衬层（32）来缓解沟槽 （30）以形成锥形部分（52）和（53）。 代替通过使侧壁（29）锥形来减小沟槽（25），可以将释放凹部的凹槽形成到邻近开口（30）的硅层（21）的第一表面（27）中。 通过减小邻近开口（30）的沟槽（25）或一个或多个衬里层（32），沟槽与填充材料的桥接的开始向下移位到水平面（36），其移动形成的空隙 在沟槽下方（36）。 通过将靠近开口的沟槽（25）和/或衬里层（32）充分地释放到足够的深度，可以完全避免在沟槽中形成空隙。