公开(公告)号：US20170271457A1

公开(公告)日：2017-09-21

申请号：US15435833

申请日：2017-02-17

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Atsushi ONOGI ,  Toru ONISHI ,  Shuhei MITANI ,  Yusuke YAMASHITA ,  Katsuhiro KUTSUKI

IPC: H01L29/16 ,  H01L27/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/423 ,  H01L29/739

CPC classification number: H01L29/1608 ,  G01K7/01 ,  G01K7/015 ,  G01K7/028 ,  H01L23/34 ,  H01L27/0255 ,  H01L27/0716 ,  H01L27/2454 ,  H01L29/083 ,  H01L29/1095 ,  H01L29/6606 ,  H01L29/7397 ,  H01L29/7804 ,  H01L29/7813 ,  H01L29/8611 ,  H01L2924/12036

Abstract: A semiconductor device includes a semiconductor substrate of silicon carbide, and a temperature sensor portion. The semiconductor substrate includes a portion in which an n-type drift region and a p-type body region are laminated. The temperature sensor portion is disposed in the semiconductor substrate and is separated from the drift region by the body region. The temperature sensor portion includes an n-type cathode region being in contact with the body region, and a p-type anode region separated from the body region by the cathode region.

公开(公告)号：US20210013039A1

公开(公告)日：2021-01-14

申请号：US16968706

申请日：2019-01-29

Applicant: DENSO CORPORATION

Inventor： Toru ONISHI ,  Katsuhiro KUTSUKI ,  Kensaku YAMAMOTO

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/51 ,  H01L29/78 ,  H01L21/02 ,  H01L29/66

Abstract: A manufacturing method of a silicon carbide semiconductor device may include: forming a gate insulating film on a silicon carbide substrate; and forming a gate electrode on the gate insulating film. The forming of the gate insulating film may include forming an oxide film on the silicon carbide substrate by thermally oxidizing the silicon carbide substrate under a nitrogen atmosphere.

公开(公告)号：US20240110970A1

公开(公告)日：2024-04-04

申请号：US18538012

申请日：2023-12-13

Applicant: DENSO CORPORATION

Inventor： Masataka DEGUCHI ,  Junya MURAMATSU ,  Keita KATAOKA ,  Katsuhiro KUTSUKI ,  Isao AOYAGI ,  Takashi TOMINAGA ,  Ryosuke OKACHI ,  Takashi KOHYAMA

IPC: G01R31/26 ,  H01L29/78

CPC classification number: G01R31/2642 ,  G01R31/2623 ,  G01R31/2644 ,  H01L29/7815

Abstract: Main cells that constitute a semiconductor element having a trench gate structure include first cells, and second cells having a structure in which gate insulating films are more easily broken by energization than those in the first cells, and the number of which is smaller than that of the first cells. At a time of driving the semiconductor element, a common gate drive voltage is applied to gate electrodes of the first cells and the second cells. An electrical characteristic is measured to detect failure of the second cells due to energization at the time of driving. The gate electrodes of the failed second cells are electrically isolated from the gate electrodes of the first cells so that the gate drive voltage is not applied to the failed second cells. The failure of the first cells is predicted based on the failure of the second cells.

公开(公告)号：US20230408572A1

公开(公告)日：2023-12-21

申请号：US18461876

申请日：2023-09-06

Applicant: DENSO CORPORATION

Inventor： Junya MURAMATSU ,  Ryosuke OKACHI ,  Katsuhiro KUTSUKI ,  Takashi TOMINAGA ,  Masataka DEGUCHI

IPC: G01R31/26

CPC classification number: G01R31/2619

Abstract: A state determination device includes an initial waveform storage unit, a waveform acquisition unit, an element temperature acquisition unit, a past waveform storage unit, and a failure state determination unit. The failure state determination unit classifies the time waveform based on the initial time waveform of the gate voltage, the current time waveform of the gate voltage, the element temperature, and the past time waveform of the gate voltage, and determines a fault condition of the IGBT.

公开(公告)号：US20180114789A1

公开(公告)日：2018-04-26

申请号：US15684057

申请日：2017-08-23

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Toru ONISHI ,  Katsuhiro KUTSUKI ,  Yasushi URAKAMI ,  Yukihiko WATANABE

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/088 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/42364 ,  H01L29/42368 ,  H01L29/7813

Abstract: A switching device may include a semiconductor substrate; gate trenches; bottom insulating layers covering bottom surfaces of the gate trenches; gate insulating layers covering side surfaces of the gate trenches; and gate electrodes arranged in the gate trenches. The gate insulating layers in a center portion may have a first thickness and a first dielectric constant, and one or more of the gate insulating layers in a peripheral portion may have, within at least a part of the peripheral portion, a second thickness thicker than the first thickness and a second dielectric constant greater than the first dielectric constant. The semiconductor substrate may include a first region being in contact with the gate insulating layers, a body region being in contact with the gate insulating layers under the first region, and a second region being in contact with the gate insulating layers under the body region.

公开(公告)号：US20220278231A1

公开(公告)日：2022-09-01

申请号：US17747293

申请日：2022-05-18

Applicant: DENSO CORPORATION

Inventor： Jun SAITO ,  Youngshin EUM ,  Keita KATAOKA ,  Yusuke YAMASHITA ,  Yukihiko WATANABE ,  Katsuhiro KUTSUKI

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/16 ,  H01L29/423

Abstract: A switching element includes a semiconductor substrate, a gate insulating film, and a gate electrode that is disposed inside the trench. The semiconductor substrate further includes: an n-type source region, a p-type body region, an n-type drift region, a p-type first electric field reduced region, and a p-type connection region. When a permittivity of the connection region is ε (F/cm), a critical electric field strength of the connection region is Ec (V/cm), an elementary charge is e (C), an area density of p-type impurity when viewed in a plan view of the connection region located below the trench is Q (cm−2), Q>ε*Ec/e.

公开(公告)号：US20220231164A1

公开(公告)日：2022-07-21

申请号：US17715381

申请日：2022-04-07

Applicant: DENSO CORPORATION

Inventor： Jun SAITO ,  Keita KATAOKA ,  Yusuke YAMASHITA ,  Yukihiko WATANABE ,  Katsuhiro KUTSUKI ,  Yasushi URAKAMI

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10

Abstract: A switching element includes a semiconductor substrate having: an n-type drift region in contact with each of gate insulating films on a bottom surface and side surfaces of each of the trenches; a p-type body region in contact with the gate insulating films on the side surfaces of each of the trenches at a position above the n-type drift region; an n-type source region in contact with the gate insulating films on the side surfaces of each of the trenches at a position above the p-type body region, the n-type source region being separated away from the n-type drift region by the p-type body region; plurality of p-type bottom regions each of which is located under a corresponding one of the trenches and located away from a corresponding one of the gate insulating films; and a p-type connection region that connects the p-type bottom regions and the p-type body region.